On Tue, Feb 28, 2017 at 03:59:52PM +0200, Imre Deak wrote: > On Tue, Feb 28, 2017 at 09:21:13AM +0200, Ander Conselvan de Oliveira wrote: > > The logic to enable a DDI in intel_mst_pre_enable_dp() is essentially > > the same as in intel_ddi_pre_enable_dp(). So reuse the latter function > > by calling the post_disable hook on the intel_dig_port instead of > ^pre_enable > > duplicating that code. > > > > Cc: Ville Syrjälä <[email protected]> > > Signed-off-by: Ander Conselvan de Oliveira > > <[email protected]> > > --- > > drivers/gpu/drm/i915/intel_ddi.c | 2 ++ > > drivers/gpu/drm/i915/intel_dp_mst.c | 23 +++-------------------- > > 2 files changed, 5 insertions(+), 20 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/intel_ddi.c > > b/drivers/gpu/drm/i915/intel_ddi.c > > index e9013f1..71aaddf 100644 > > --- a/drivers/gpu/drm/i915/intel_ddi.c > > +++ b/drivers/gpu/drm/i915/intel_ddi.c > > @@ -1695,6 +1695,8 @@ static void intel_ddi_pre_enable_dp(struct > > intel_encoder *encoder, > > enum port port = intel_ddi_get_encoder_port(encoder); > > struct intel_digital_port *dig_port = enc_to_dig_port(&encoder->base); > > > > + WARN_ON(link_mst && port == PORT_A); > > + > > So IIUC, this wasn't used before for MST and so link_mst was always > false.
The MST code explicitly passes 'true' here. > Also link_mst=true implies type == INTEL_OUTPUT_DP, as this will > be called for the primary encoder. After the change crtc->config will be > used instead of the (new) pipe_config, but this is fine since the two > are the same in the enable hooks. Nope. AFAICS this should explode totally since encoder->crtc for the primary will be NULL. I guess Maarten didn't yet nuke all crtc->config usage from the ddi code (or he did but the patches didn't get reviewed). > Looks ok to me: > > Reviewed-by: Imre Deak <[email protected]> > > > intel_dp_set_link_params(intel_dp, link_rate, lane_count, > > link_mst); > > if (encoder->type == INTEL_OUTPUT_EDP) > > diff --git a/drivers/gpu/drm/i915/intel_dp_mst.c > > b/drivers/gpu/drm/i915/intel_dp_mst.c > > index a8334e1..094cbdc 100644 > > --- a/drivers/gpu/drm/i915/intel_dp_mst.c > > +++ b/drivers/gpu/drm/i915/intel_dp_mst.c > > @@ -159,26 +159,9 @@ static void intel_mst_pre_enable_dp(struct > > intel_encoder *encoder, > > > > DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links); > > > > - if (intel_dp->active_mst_links == 0) { > > - intel_ddi_clk_select(&intel_dig_port->base, > > - pipe_config->shared_dpll); > > - > > - intel_display_power_get(dev_priv, > > - intel_dig_port->ddi_io_power_domain); > > - > > - intel_prepare_dp_ddi_buffers(&intel_dig_port->base); > > - intel_dp_set_link_params(intel_dp, > > - pipe_config->port_clock, > > - pipe_config->lane_count, > > - true); > > - > > - intel_ddi_init_dp_buf_reg(&intel_dig_port->base); > > - > > - intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON); > > - > > - intel_dp_start_link_train(intel_dp); > > - intel_dp_stop_link_train(intel_dp); > > - } > > + if (intel_dp->active_mst_links == 0) > > + intel_dig_port->base.pre_enable(&intel_dig_port->base, > > + pipe_config, NULL); > > > > ret = drm_dp_mst_allocate_vcpi(&intel_dp->mst_mgr, > > connector->port, > > -- > > 2.9.3 > > > > _______________________________________________ > > Intel-gfx mailing list > > [email protected] > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx > _______________________________________________ > Intel-gfx mailing list > [email protected] > https://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Ville Syrjälä Intel OTC _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
