On Mon, Apr 10, 2017 at 08:53:25AM +0000, Michal Wajdeczko wrote:
> There is no need to use macros as we can use generic function.
> And we can save ~2000 bytes in driver footprint.
> 
> Signed-off-by: Michal Wajdeczko <[email protected]>
> Cc: Paulo Zanoni <[email protected]>
> Cc: Chris Wilson <[email protected]>
> ---
>  drivers/gpu/drm/i915/intel_display.c | 18 +++++++++++++-----
>  1 file changed, 13 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c 
> b/drivers/gpu/drm/i915/intel_display.c
> index b6b40cd..63f9dae4 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -7697,22 +7697,30 @@ static void ironlake_init_pch_refclk(struct 
> drm_i915_private *dev_priv)
>  
>  static void lpt_reset_fdi_mphy(struct drm_i915_private *dev_priv)
>  {
> +     int ret;
>       uint32_t tmp;
>  
>       tmp = I915_READ(SOUTH_CHICKEN2);
>       tmp |= FDI_MPHY_IOSFSB_RESET_CTL;
>       I915_WRITE(SOUTH_CHICKEN2, tmp);
>  
> -     if (wait_for_us(I915_READ(SOUTH_CHICKEN2) &
> -                     FDI_MPHY_IOSFSB_RESET_STATUS, 100))
> +     ret = __intel_wait_for_register_fw(dev_priv,
> +                                        SOUTH_CHICKEN2,
> +                                        FDI_MPHY_IOSFSB_RESET_STATUS,
> +                                        FDI_MPHY_IOSFSB_RESET_STATUS,
> +                                        100, 0, &tmp);
> +     if (ret)
>               DRM_ERROR("FDI mPHY reset assert timeout\n");

If we aren't using ret, and if the function remains neatly aligned I
would have just done

        if ( __intel_wait_for_register_fw(dev_priv, ...))
                DRM_ERROR("FDI mPHY reset assert timeout\n");

I would also let it have a 10ms max timeout - there's no downside. We
didn't before because of the expense of the wait_for() loops, and this
must be a waitable context.

Hmm. We do want __inte_wait_for_register_fw:
        might_sleep_if(fast_timeout_us > 10 || slow_timeout_ms);
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre
_______________________________________________
Intel-gfx mailing list
[email protected]
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Reply via email to