Really sorry, please ignore this mail with wrong patch. Will send the correct one then.
Thanks. Best Regards. Weinan, LI > -----Original Message----- > From: Li, Weinan Z > Sent: Wednesday, May 10, 2017 10:48 AM > To: [email protected]; [email protected] > Cc: Li, Weinan Z <[email protected]>; Chris Wilson <chris@chris- > wilson.co.uk>; Joonas Lahtinen <[email protected]> > Subject: [PATCH v4] drm/i915/gvt: return the correct usable aperture size > under gvt environment > > I915_GEM_GET_APERTURE ioctl is used to probe aperture size from userspace. > In gvt environment, each vm only use the ballooned part of aperture, so we > should return the correct available aperture size exclude the reserved part by > balloon. > > v2: add 'reserved' in struct i915_address_space to record the reserved size in > ggtt. > > v3: remain aper_size as total, adjust aper_available_size exclude reserved and > pinned. UMD driver need to adjust the max allocation size according to the > available aperture size but not total size. KMD return the correct usable > aperture size any time. > > v4: add onion teardown to balloon and deballoon to make sure the reserved > stays correct. Code style refine. > > Cc: Chris Wilson <[email protected]> > Cc: Joonas Lahtinen <[email protected]> > Signed-off-by: Weinan Li <[email protected]> > --- > drivers/gpu/drm/i915/i915_gem.c | 4 ++-- > drivers/gpu/drm/i915/i915_gem_gtt.h | 1 + > drivers/gpu/drm/i915/i915_vgpu.c | 8 +++++++- > 3 files changed, 10 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_gem.c > b/drivers/gpu/drm/i915/i915_gem.c index 33fb11c..8d8d9c0 100644 > --- a/drivers/gpu/drm/i915/i915_gem.c > +++ b/drivers/gpu/drm/i915/i915_gem.c > @@ -156,8 +156,8 @@ int i915_mutex_lock_interruptible(struct drm_device > *dev) > mutex_unlock(&dev->struct_mutex); > > args->aper_size = ggtt->base.total; > - args->aper_available_size = args->aper_size - pinned; > - > + args->aper_available_size = args->aper_size - > + ggtt->base.reserved - pinned; > return 0; > } > > diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h > b/drivers/gpu/drm/i915/i915_gem_gtt.h > index fb15684..da9aa9f 100644 > --- a/drivers/gpu/drm/i915/i915_gem_gtt.h > +++ b/drivers/gpu/drm/i915/i915_gem_gtt.h > @@ -255,6 +255,7 @@ struct i915_address_space { > struct drm_i915_file_private *file; > struct list_head global_link; > u64 total; /* size addr space maps (ex. 2GB for ggtt) */ > + u64 reserved; /* size addr space reserved */ > > bool closed; > > diff --git a/drivers/gpu/drm/i915/i915_vgpu.c > b/drivers/gpu/drm/i915/i915_vgpu.c > index 4ab8a97..b144cf6 100644 > --- a/drivers/gpu/drm/i915/i915_vgpu.c > +++ b/drivers/gpu/drm/i915/i915_vgpu.c > @@ -109,8 +109,10 @@ void intel_vgt_deballoon(struct drm_i915_private > *dev_priv) > DRM_DEBUG("VGT deballoon.\n"); > > for (i = 0; i < 4; i++) { > - if (bl_info.space[i].allocated) > + if (bl_info.space[i].allocated) { > + dev_priv->ggtt->base.reserved -= bl_info.space[i].size; > drm_mm_remove_node(&bl_info.space[i]); > + } > } > > memset(&bl_info, 0, sizeof(bl_info)); > @@ -216,6 +218,7 @@ int intel_vgt_balloon(struct drm_i915_private > *dev_priv) > > if (ret) > goto err; > + ggtt->base.reserved += bl_info.space[2].size; > } > > if (unmappable_end < ggtt_end) { > @@ -223,6 +226,7 @@ int intel_vgt_balloon(struct drm_i915_private > *dev_priv) > unmappable_end, ggtt_end); > if (ret) > goto err; > + ggtt->base.reserved += bl_info.space[3].size; > } > > /* Mappable graphic memory ballooning */ @@ -232,6 +236,7 @@ int > intel_vgt_balloon(struct drm_i915_private *dev_priv) > > if (ret) > goto err; > + ggtt->base.reserved += bl_info.space[0].size; > } > > if (mappable_end < ggtt->mappable_end) { @@ -240,6 +245,7 @@ int > intel_vgt_balloon(struct drm_i915_private *dev_priv) > > if (ret) > goto err; > + ggtt->base.reserved += bl_info.space[1].size; > } > > DRM_INFO("VGT balloon successfully\n"); > -- > 1.9.1 _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
