intel-gfx  

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• • [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/6] drm/i915: Shrink ilk-bdw wm storage by using u16 (rev2) Patchwork
• [Intel-gfx] [PATCH] drm/i915: Don't forget to reset blocks when testing lower wm levels Matt Roper
  • Re: [Intel-gfx] [PATCH] drm/i915: Don't forget to reset blocks when testing lower wm levels Ville Syrjälä
  • Re: [Intel-gfx] [PATCH] drm/i915: Don't forget to reset blocks when testing lower wm levels Matt Roper
  • [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Don't forget to reset blocks when testing lower wm levels Patchwork
  • [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Don't forget to reset blocks when testing lower wm levels Patchwork
• [Intel-gfx] A collection of pending bug [fixes] Chris Wilson
  • [Intel-gfx] [PATCH 19/19] drm/i915: Mark up Ironlake ips with rpm wakerefs Chris Wilson
  • [Intel-gfx] [PATCH 03/19] drm/i915/userptr: Probe vma range before gup Chris Wilson
  • [Intel-gfx] [PATCH 04/19] drm/i915/selftests: Check we can recover a wedged device Chris Wilson
  • Re: [Intel-gfx] [PATCH 04/19] drm/i915/selftests: Check we can recover a wedged device Tvrtko Ursulin
  • Re: [Intel-gfx] [PATCH 04/19] drm/i915/selftests: Check we can recover a wedged device Tvrtko Ursulin
  • Re: [Intel-gfx] [PATCH 04/19] drm/i915/selftests: Check we can recover a wedged device Chris Wilson
  • [Intel-gfx] [PATCH 05/19] drm/i915/selftests: Verify we can perform resets from atomic context Chris Wilson
  • Re: [Intel-gfx] [PATCH 05/19] drm/i915/selftests: Verify we can perform resets from atomic context Tvrtko Ursulin
  • Re: [Intel-gfx] [PATCH 05/19] drm/i915/selftests: Verify we can perform resets from atomic context Chris Wilson
  • [Intel-gfx] [PATCH 12/19] drm/i915: Markup paired operations on wakerefs Chris Wilson
  • [Intel-gfx] [PATCH 09/19] drm/i915: Report the number of closed vma held by each context in debugfs Chris Wilson
  • [Intel-gfx] [PATCH 01/19] drm/i915: Return immediately if trylock fails for direct-reclaim Chris Wilson
  • [Intel-gfx] [PATCH 16/19] drm/i915: Combined gt.awake/gt.power wakerefs Chris Wilson
  • [Intel-gfx] [PATCH 07/19] drm/i915/icl: Mind the SFC units when resetting VD or VEBox engines Chris Wilson
  • Re: [Intel-gfx] [PATCH 07/19] drm/i915/icl: Mind the SFC units when resetting VD or VEBox engines Tvrtko Ursulin
  • Re: [Intel-gfx] [PATCH 07/19] drm/i915/icl: Mind the SFC units when resetting VD or VEBox engines Tvrtko Ursulin
  • Re: [Intel-gfx] [PATCH 07/19] drm/i915/icl: Mind the SFC units when resetting VD or VEBox engines Chris Wilson
  • Re: [Intel-gfx] [PATCH 07/19] drm/i915/icl: Mind the SFC units when resetting VD or VEBox engines Tvrtko Ursulin
  • Re: [Intel-gfx] [PATCH 07/19] drm/i915/icl: Mind the SFC units when resetting VD or VEBox engines Chris Wilson
  • [Intel-gfx] [PATCH 06/19] drm/i915/icl: Record the valid VDBoxes with SFC capability Chris Wilson
  • Re: [Intel-gfx] [PATCH 06/19] drm/i915/icl: Record the valid VDBoxes with SFC capability Tvrtko Ursulin
  • [Intel-gfx] [PATCH 17/19] drm/i915/dp: Markup pps lock power well Chris Wilson
  • [Intel-gfx] [PATCH 10/19] drm/i915: Remove debugfs/i915_ppgtt_info Chris Wilson
  • [Intel-gfx] [PATCH 13/19] drm/i915: Syntatic sugar for using intel_runtime_pm Chris Wilson
  • [Intel-gfx] [PATCH 18/19] drm/i915: Complain if hsw_get_pipe_config acquires the same power well twice Chris Wilson
  • [Intel-gfx] [PATCH 08/19] drm/i915: Always try to reset the GPU on takeover Chris Wilson
  • [Intel-gfx] [PATCH 14/19] drm/i915: Markup paired operations on display power domains Chris Wilson
  • [Intel-gfx] [PATCH 11/19] drm/i915: Track all held rpm wakerefs Chris Wilson
  • [Intel-gfx] [PATCH 15/19] drm/i915: Track the wakeref used to initialise display power domains Chris Wilson
  • [Intel-gfx] [PATCH 02/19] drm/i915/userptr: Avoid struct_mutex recursion for mmu_invalidate_range_start Chris Wilson
  • [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/19] drm/i915: Return immediately if trylock fails for direct-reclaim Patchwork
  • [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [01/19] drm/i915: Return immediately if trylock fails for direct-reclaim Patchwork
  • [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [01/19] drm/i915: Return immediately if trylock fails for direct-reclaim Patchwork
  • [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [01/19] drm/i915: Return immediately if trylock fails for direct-reclaim Patchwork
• [Intel-gfx] [PATCH] drm/amd: Compile fix for amdgpu_dm.c Mika Kuoppala
  • [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/amd: Compile fix for amdgpu_dm.c Patchwork
  • Re: [Intel-gfx] [PATCH] drm/amd: Compile fix for amdgpu_dm.c Boris Brezillon
  • Re: [Intel-gfx] [PATCH] drm/amd: Compile fix for amdgpu_dm.c Boris Brezillon
  • Re: [Intel-gfx] [PATCH] drm/amd: Compile fix for amdgpu_dm.c Mika Kuoppala
  • Re: [Intel-gfx] [PATCH] drm/amd: Compile fix for amdgpu_dm.c Boris Brezillon
  • Re: [Intel-gfx] [PATCH] drm/amd: Compile fix for amdgpu_dm.c kbuild test robot
• [Intel-gfx] [drm-intel:for-linux-next-fixes 5/5] drivers/gpu//drm/i915/intel_ringbuffer.c:89:11: error: implicit declaration of function 'i915_scratch_offset'; did you mean 'i915_ggtt_offset'? kbuild test robot
  • Re: [Intel-gfx] [drm-intel:for-linux-next-fixes 5/5] drivers/gpu//drm/i915/intel_ringbuffer.c:89:11: error: implicit declaration of function 'i915_scratch_offset'; did you mean 'i915_ggtt_offset'? Joonas Lahtinen
• [Intel-gfx] [drm-tip:drm-tip 5/10] drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c:1666:30: warning: passing argument 1 of 'drm_atomic_private_obj_init' from incompatible pointer type kbuild test robot
• [Intel-gfx] [PATCH 0/2] Add gamma/degamma LUT validation helpers Matt Roper
  • [Intel-gfx] [PATCH 1/2] drm: Add color management LUT validation helpers Matt Roper
  • Re: [Intel-gfx] [PATCH 1/2] drm: Add color management LUT validation helpers Brian Starkey
  • [Intel-gfx] [PATCH 2/2] drm/i915: Validate userspace-provided color management LUT's Matt Roper
  • Re: [Intel-gfx] [PATCH 2/2] drm/i915: Validate userspace-provided color management LUT's kbuild test robot
  • Re: [Intel-gfx] [PATCH 2/2] drm/i915: Validate userspace-provided color management LUT's kbuild test robot
  • [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add gamma/degamma LUT validation helpers Patchwork
  • [Intel-gfx] ✓ Fi.CI.BAT: success for Add gamma/degamma LUT validation helpers Patchwork
  • [Intel-gfx] ✓ Fi.CI.IGT: success for Add gamma/degamma LUT validation helpers Patchwork
• [Intel-gfx] [drm-tip:drm-tip 5/10] drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c:1666:30: error: passing argument 1 of 'drm_atomic_private_obj_init' from incompatible pointer type kbuild test robot
• [Intel-gfx] [PATCH v2] drm/i915: correct the pitch check for NV12 framebuffer Dongseong Hwang
  • [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: correct the pitch check for NV12 framebuffer Patchwork
  • [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: correct the pitch check for NV12 framebuffer Patchwork
  • Re: [Intel-gfx] [PATCH v2] drm/i915: correct the pitch check for NV12 framebuffer Ville Syrjälä
  • Re: [Intel-gfx] [PATCH v2] drm/i915: correct the pitch check for NV12 framebuffer Daniel Vetter
  • Re: [Intel-gfx] [PATCH v2] drm/i915: correct the pitch check for NV12 framebuffer Ville Syrjälä
  • Re: [Intel-gfx] [PATCH v2] drm/i915: correct the pitch check for NV12 framebuffer Hwang, Dongseong
  • [Intel-gfx] [PATCH v3] drm/i915: correct the pitch check for NV12 framebuffer raviraj . p . sitaram
• [Intel-gfx] [v3 00/14] Add HDR Metadata Parsing and handling in DRM layer Uma Shankar
  • [Intel-gfx] [v3 01/14] drm: Add HDR source metadata property Uma Shankar
  • [Intel-gfx] [v3 05/14] drm/i915: Attach HDR metadata property to connector Uma Shankar
  • [Intel-gfx] [v3 02/14] drm: Add CEA extended tag blocks and HDR bitfield macros Uma Shankar
  • [Intel-gfx] [v3 06/14] drm: Add HDR capability field to plane structure Uma Shankar
  • [Intel-gfx] [v3 04/14] drm: Parse Colorimetry data block from EDID Uma Shankar
  • [Intel-gfx] [v3 03/14] drm: Parse HDR metadata info from EDID Uma Shankar
  • [Intel-gfx] [v3 10/14] drm/i915: [DO NOT MERGE] hack for glk board outputs Uma Shankar
  • [Intel-gfx] [v3 07/14] drm: Implement HDR source metadata set and get property handling Uma Shankar
  • [Intel-gfx] [v3 13/14] drm/i915:Enabled Modeset when HDR Infoframe changes Uma Shankar
  • [Intel-gfx] [v3 14/14] drivers/video: Constantify function argument for HDMI infoframe log Uma Shankar
  • [Intel-gfx] [v3 09/14] drm/i915: Write HDR infoframe and send to panel Uma Shankar
  • [Intel-gfx] [v3 11/14] drm/i915: Add HLG EOTF Uma Shankar
  • [Intel-gfx] [v3 08/14] drm: Enable HDR infoframe support Uma Shankar
  • [Intel-gfx] [v3 12/14] drm/i915: Enable infoframes on GLK+ for HDR Uma Shankar
  • [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add HDR Metadata Parsing and handling in DRM layer (rev3) Patchwork
  • [Intel-gfx] ✓ Fi.CI.BAT: success for Add HDR Metadata Parsing and handling in DRM layer (rev3) Patchwork
  • [Intel-gfx] ✓ Fi.CI.IGT: success for Add HDR Metadata Parsing and handling in DRM layer (rev3) Patchwork
• [Intel-gfx] [v2 00/14] Add HDR Metadata Parsing and handling in DRM layer Uma Shankar
  • [Intel-gfx] [v2 03/14] drm: Parse HDR metadata info from EDID Uma Shankar
  • [Intel-gfx] [v2 01/14] drm: Add HDR source metadata property Uma Shankar
  • [Intel-gfx] [v2 02/14] drm: Add CEA extended tag blocks and HDR bitfield macros Uma Shankar
  • [Intel-gfx] [v2 05/14] drm/i915: Attach HDR metadata property to connector Uma Shankar
  • [Intel-gfx] [v2 04/14] drm: Parse Colorimetry data block from EDID Uma Shankar
  • [Intel-gfx] [v2 06/14] drm: Add HDR capability field to plane structure Uma Shankar
  • [Intel-gfx] [v2 09/14] drm/i915: Write HDR infoframe and send to panel Uma Shankar
  • [Intel-gfx] [v2 14/14] drivers/video: Constantify function argument for HDMI infoframe log Uma Shankar
  • [Intel-gfx] [v2 07/14] drm: Implement HDR source metadata set and get property handling Uma Shankar
  • [Intel-gfx] [v2 08/14] drm: Enable HDR infoframe support Uma Shankar
  • [Intel-gfx] [v2 10/14] drm/i915: [DO NOT MERGE] hack for glk board outputs Uma Shankar
  • [Intel-gfx] [v2 11/14] drm/i915: Add HLG EOTF Uma Shankar
  • [Intel-gfx] [v2 13/14] drm/i915:Enabled Modeset when HDR Infoframe changes Uma Shankar
  • [Intel-gfx] [v2 12/14] drm/i915: Enable infoframes on GLK+ for HDR Uma Shankar
  • [Intel-gfx] ✗ Fi.CI.BAT: failure for Add HDR Metadata Parsing and handling in DRM layer (rev2) Patchwork
• [Intel-gfx] [v5 0/2] Add Colorspace connector property interface Uma Shankar
  • [Intel-gfx] [v5 1/2] drm: Add colorspace connector property Uma Shankar
  • Re: [Intel-gfx] [v5 1/2] drm: Add colorspace connector property kbuild test robot
  • [Intel-gfx] [v5 2/2] drm/i915: Attach colorspace property and enable modeset Uma Shankar
  • [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add Colorspace connector property interface (rev5) Patchwork
  • [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Add Colorspace connector property interface (rev5) Patchwork
  • [Intel-gfx] ✓ Fi.CI.BAT: success for Add Colorspace connector property interface (rev5) Patchwork
  • [Intel-gfx] ✓ Fi.CI.IGT: success for Add Colorspace connector property interface (rev5) Patchwork
• [Intel-gfx] [CI 1/2] drm/i915: Don't use DDB allocation when choosing gen9 watermark method Matt Roper
  • [Intel-gfx] [CI 2/2] drm/i915: Switch to level-based DDB allocation algorithm (v5) Matt Roper
  • [Intel-gfx] [CI 2/2] drm/i915: Switch to level-based DDB allocation algorithm (v6) Matt Roper
  • [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [CI,1/2] drm/i915: Don't use DDB allocation when choosing gen9 watermark method Patchwork
  • [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [CI,1/2] drm/i915: Don't use DDB allocation when choosing gen9 watermark method Patchwork
  • [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [CI,1/2] drm/i915: Don't use DDB allocation when choosing gen9 watermark method (rev2) Patchwork
  • [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [CI,1/2] drm/i915: Don't use DDB allocation when choosing gen9 watermark method (rev2) Patchwork
  • [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [CI,1/2] drm/i915: Don't use DDB allocation when choosing gen9 watermark method Patchwork
  • [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [CI,1/2] drm/i915: Don't use DDB allocation when choosing gen9 watermark method (rev2) Patchwork
  • Re: [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [CI,1/2] drm/i915: Don't use DDB allocation when choosing gen9 watermark method (rev2) Matt Roper
  • Re: [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [CI,1/2] drm/i915: Don't use DDB allocation when choosing gen9 watermark method (rev2) Saarinen, Jani
• [Intel-gfx] [PATCH] drm/i915: DFSM pipe disable is valid from gen9 onwards Bob Paauwe
  • Re: [Intel-gfx] [PATCH] drm/i915: DFSM pipe disable is valid from gen9 onwards Ville Syrjälä
  • [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: DFSM pipe disable is valid from gen9 onwards Patchwork
  • [Intel-gfx] [PATCH] drm/i915: DFSM pipe disable is valid from gen9 onwards (v2) Bob Paauwe
  • Re: [Intel-gfx] [PATCH] drm/i915: DFSM pipe disable is valid from gen9 onwards (v2) Matt Roper
  • [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: DFSM pipe disable is valid from gen9 onwards Patchwork
  • [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: DFSM pipe disable is valid from gen9 onwards (rev2) Patchwork
  • [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: DFSM pipe disable is valid from gen9 onwards (rev2) Patchwork
• [Intel-gfx] [PATCH v3 1/2] drm/i915: Don't use DDB allocation when choosing gen9 watermark method Matt Roper
  • [Intel-gfx] [PATCH v3 2/2] drm/i915: Switch to level-based DDB allocation algorithm (v4) Matt Roper
  • Re: [Intel-gfx] [PATCH v3 2/2] drm/i915: Switch to level-based DDB allocation algorithm (v4) Ville Syrjälä
  • [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [v3,1/2] drm/i915: Don't use DDB allocation when choosing gen9 watermark method Patchwork
  • [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v3,1/2] drm/i915: Don't use DDB allocation when choosing gen9 watermark method Patchwork
  • [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v3,1/2] drm/i915: Don't use DDB allocation when choosing gen9 watermark method Patchwork
• Re: [Intel-gfx] [PATCH v2 1/4] drm/i915: Get active pending request for given context Navik, Ankit P
• [Intel-gfx] [PATCH libdrm 1/8] new syncobj extension v3 Chunming Zhou
  • [Intel-gfx] [PATCH libdrm 3/8] add timeline wait/query ioctl v2 Chunming Zhou
  • [Intel-gfx] [PATCH libdrm 2/8] addr cs chunk for syncobj timeline Chunming Zhou
  • [Intel-gfx] [PATCH libdrm 4/8] wrap syncobj timeline query/wait APIs for amdgpu v3 Chunming Zhou
  • [Intel-gfx] [PATCH libdrm 6/8] expose timeline signal/export/import interfaces v2 Chunming Zhou
  • [Intel-gfx] [PATCH libdrm 5/8] add timeline signal/transfer ioctls v2 Chunming Zhou
  • [Intel-gfx] [PATCH libdrm 8/8] add syncobj timeline tests v3 Chunming Zhou
  • [Intel-gfx] [PATCH libdrm 7/8] wrap transfer interfaces Chunming Zhou
• Re: [Intel-gfx] [PATCH v2 0/4] Dynamic EU configuration of Slice/Subslice/EU. Navik, Ankit P
• [Intel-gfx] [PATCH v3 0/4] Dynamic EU configuration of Slice/Subslice/EU. Ankit Navik
  • [Intel-gfx] [PATCH v3 0/4] Dynamic EU configuration of Slice/Subslice/EU. Ankit Navik
  • [Intel-gfx] [PATCH v3 1/4] drm/i915: Get active pending request for given context Ankit Navik
  • Re: [Intel-gfx] [PATCH v3 1/4] drm/i915: Get active pending request for given context Tvrtko Ursulin
  • [Intel-gfx] [PATCH v3 3/4] drm/i915: set optimum eu/slice/sub-slice configuration based on load type Ankit Navik
  • Re: [Intel-gfx] [PATCH v3 3/4] drm/i915: set optimum eu/slice/sub-slice configuration based on load type Tvrtko Ursulin
  • Re: [Intel-gfx] [PATCH v3 3/4] drm/i915: set optimum eu/slice/sub-slice configuration based on load type Navik, Ankit P
  • [Intel-gfx] [PATCH v3 2/4] drm/i915: Update render power clock state configuration for given context Ankit Navik
  • Re: [Intel-gfx] [PATCH v3 2/4] drm/i915: Update render power clock state configuration for given context Tvrtko Ursulin
  • [Intel-gfx] [PATCH v3 4/4] drm/i915: Predictive governor to control eu/slice/subslice Ankit Navik
  • Re: [Intel-gfx] [PATCH v3 4/4] drm/i915: Predictive governor to control eu/slice/subslice Tvrtko Ursulin
  • [Intel-gfx] ✗ Fi.CI.BAT: failure for Dynamic EU configuration of Slice/Subslice/EU. Patchwork
  • Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for Dynamic EU configuration of Slice/Subslice/EU. Tvrtko Ursulin
  • Re: [Intel-gfx] [PATCH v3 0/4] Dynamic EU configuration of Slice/Subslice/EU. Tvrtko Ursulin
  • Re: [Intel-gfx] [PATCH v3 0/4] Dynamic EU configuration of Slice/Subslice/EU. Navik, Ankit P
  • Re: [Intel-gfx] [PATCH v3 0/4] Dynamic EU configuration of Slice/Subslice/EU. Joonas Lahtinen
  • Re: [Intel-gfx] [PATCH v3 0/4] Dynamic EU configuration of Slice/Subslice/EU. Navik, Ankit P
• [Intel-gfx] [PATCH v3 1/4] drm/i915: Get active pending request for given context Ankit Navik
  • [Intel-gfx] [PATCH v3 4/4] drm/i915: Predictive governor to control eu/slice/subslice Ankit Navik
  • [Intel-gfx] [PATCH v3 3/4] drm/i915: set optimum eu/slice/sub-slice configuration based on load type Ankit Navik
  • [Intel-gfx] [PATCH v3 2/4] drm/i915: Update render power clock state configuration for given context Ankit Navik
  • [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [v3,1/4] drm/i915: Get active pending request for given context Patchwork
• Re: [Intel-gfx] [PATCH 3/5] drm/dp: Implement I2C_M_STOP for i2c-over-aux Dhinakaran Pandiyan
  • Re: [Intel-gfx] [PATCH 3/5] drm/dp: Implement I2C_M_STOP for i2c-over-aux Daniel Vetter
  • Re: [Intel-gfx] [PATCH 3/5] drm/dp: Implement I2C_M_STOP for i2c-over-aux Ville Syrjälä
• [Intel-gfx] ✓ Fi.CI.IGT: success for /drm/i915/hdmi: SCDC Scrambling enable without CTS mode (rev3) Patchwork
• [Intel-gfx] [PATCH v2 1/2] drm/i915: Don't use DDB allocation when choosing gen9 watermark method Matt Roper
  • [Intel-gfx] [PATCH v2 2/2] drm/i915: Switch to level-based DDB allocation algorithm (v3) Matt Roper
  • Re: [Intel-gfx] [PATCH v2 2/2] drm/i915: Switch to level-based DDB allocation algorithm (v3) Ville Syrjälä
  • Re: [Intel-gfx] [PATCH v2 2/2] drm/i915: Switch to level-based DDB allocation algorithm (v3) Matt Roper
  • Re: [Intel-gfx] [PATCH v2 2/2] drm/i915: Switch to level-based DDB allocation algorithm (v3) Ville Syrjälä
  • Re: [Intel-gfx] [PATCH v2 2/2] drm/i915: Switch to level-based DDB allocation algorithm (v3) Ville Syrjälä
  • [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [v2,1/2] drm/i915: Don't use DDB allocation when choosing gen9 watermark method Patchwork
  • [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/2] drm/i915: Don't use DDB allocation when choosing gen9 watermark method Patchwork
  • [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [v2,1/2] drm/i915: Don't use DDB allocation when choosing gen9 watermark method Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for /drm/i915/hdmi: SCDC Scrambling enable without CTS mode (rev3) Patchwork
• [Intel-gfx] [PATCH v3] /drm/i915/hdmi: SCDC Scrambling enable without CTS mode clinton . a . taylor
  • Re: [Intel-gfx] [PATCH v3] /drm/i915/hdmi: SCDC Scrambling enable without CTS mode Ville Syrjälä
• [Intel-gfx] [PATCH v2 1/2] drm/i915: Use intel_ types more consistently for watermark code (v2) Matt Roper
  • [Intel-gfx] [PATCH v2 2/2] drm/i915: Use intel_ types more consistently for color management code (v2) Matt Roper
  • [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v2,1/2] drm/i915: Use intel_ types more consistently for watermark code (v2) Patchwork
  • [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [v2,1/2] drm/i915: Use intel_ types more consistently for watermark code (v2) Patchwork
  • [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/2] drm/i915: Use intel_ types more consistently for watermark code (v2) Patchwork
  • [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v2,1/2] drm/i915: Use intel_ types more consistently for watermark code (v2) Patchwork
• [Intel-gfx] [PATCH] drm/dp: Set the MOT bit for Write_Status_Update_Request transactions Dhinakaran Pandiyan
  • Re: [Intel-gfx] [PATCH] drm/dp: Set the MOT bit for Write_Status_Update_Request transactions Ville Syrjälä
  • Re: [Intel-gfx] [PATCH] drm/dp: Set the MOT bit for Write_Status_Update_Request transactions Ville Syrjälä
  • Re: [Intel-gfx] [PATCH] drm/dp: Set the MOT bit for Write_Status_Update_Request transactions Dhinakaran Pandiyan
  • Re: [Intel-gfx] [PATCH] drm/dp: Set the MOT bit for Write_Status_Update_Request transactions Ville Syrjälä
  • [Intel-gfx] ✓ Fi.CI.BAT: success for drm/dp: Set the MOT bit for Write_Status_Update_Request transactions Patchwork
  • [Intel-gfx] ✓ Fi.CI.IGT: success for drm/dp: Set the MOT bit for Write_Status_Update_Request transactions Patchwork
• Re: [Intel-gfx] [PATCH v6] drm/i915/icl: Preempt-to-idle support in execlists. Tvrtko Ursulin
  • Re: [Intel-gfx] [PATCH v6] drm/i915/icl: Preempt-to-idle support in execlists. Joonas Lahtinen
  • Re: [Intel-gfx] [PATCH v6] drm/i915/icl: Preempt-to-idle support in execlists. Lis, Tomasz

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