Quoting Michel Thierry (2017-08-18 17:31:38)
> On 18/08/17 02:05, Chris Wilson wrote:
> > During a global reset, we disable the irq. As we disable the irq, the
> > hardware may be raising a GT interrupt that we then ignore, leaving it
> > pending in the GTIIR. After the reset, we then re-enable the irq,
> > triggering the pending interrupt. However, that interrupt was for the
> > stale state from before the reset, and the contents of the CSB buffer
> > are now invalid.
> >
> > v2: Add a comment to make it clear that the double clear is purely my
> > paranoia.
>
> Or say I was the paranoid.
>
> >
> > Reported-by: "Dong, Chuanxiao" <[email protected]>
> > Signed-off-by: Chris Wilson <[email protected]>
> > Cc: "Dong, Chuanxiao" <[email protected]>
> > Cc: Tvrtko Ursulin <[email protected]>
> > Cc: Michal Winiarski <[email protected]>
> > Cc: Michel Thierry <[email protected]>
> > Link:
> > https://patchwork.freedesktop.org/patch/msgid/[email protected]
[snip]
> Reviewed-by: Michel Thierry <[email protected]>
Marked it up with
Fixes: 821ed7df6e2a ("drm/i915: Update reset path to fix incomplete requests")
as though the likelihood is very low, we might as well be accurate.
Thanks for the review, and many thanks to Chuanxiao for spotting the
issue. Pushed.
-Chris
_______________________________________________
Intel-gfx mailing list
[email protected]
https://lists.freedesktop.org/mailman/listinfo/intel-gfx