On Wed, Aug 30, 2017 at 09:57:03PM +0300, [email protected] wrote:
> From: Ville Syrjälä <[email protected]>
> 
> Make the min_pixclk thing less confusing by changing it to track
> the minimum acceptable cdclk frequency instead. This means moving
> the application of the guardbands to a slightly higher level from
> the low level platform specific calc_cdclk() functions.
> 
> The immediate benefit is elimination of the confusing 2x factors
> on GLK/CNL+ in the audio workarounds (which stems from the fact
> that the pipes produce two pixels per clock).
> 
> v2: Keep cdclk higher on CNL to workaround missing DDI clock voltage handling
> v3: Squash with the CNL cdclk limits patch (DK)
> v4: s/intel_min_cdclk/intel_pixel_rate_to_cdclk/ (DK)
> 
> Cc: Paulo Zanoni <[email protected]>
> Cc: Rodrigo Vivi <[email protected]>
> Cc: Dhinakaran Pandiyan <[email protected]>
> Cc: Maarten Lankhorst <[email protected]>
> Reviewed-by: Dhinakaran Pandiyan <[email protected]>
> Signed-off-by: Ville Syrjälä <[email protected]>

I didn't get any objections from the CNL camp, so I went ahead and
pushed the series. Thanks for the reviews.

-- 
Ville Syrjälä
Intel OTC
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