Quoting Matthew Auld (2017-11-07 16:24:47) > On 7 November 2017 at 11:56, Chris Wilson <[email protected]> wrote: > > Since the partial tiling tests are poking into the GGTT to watch the > > fence registers in operation, it itself needs the device rpm wakeref in > > order for the GGTT to remain accessible. > > > > Signed-off-by: Chris Wilson <[email protected]> > > Cc: Joonas Lahtinen <[email protected]> > > Cc: Mika Kuoppala <[email protected]> > Reviewed-by: Matthew Auld <[email protected]>
Pushed, thanks for the review. -Chris _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
