On Thu, Jan 18, 2018 at 05:31:45PM +0200, Jani Nikula wrote: > On Thu, 18 Jan 2018, David Weinehall <[email protected]> wrote: > > On Thu, Jan 18, 2018 at 05:04:59PM +0200, Jani Nikula wrote: > >> Update VBT defs to reflect revision 216. While at it, default the > >> expected child device struct size to sizeof the size rather than a > >> hardcoded value. > >> > >> Cc: Rodrigo Vivi <[email protected]> > >> Signed-off-by: Jani Nikula <[email protected]> > > > > > >> --- > >> drivers/gpu/drm/i915/intel_bios.c | 8 +++++--- > >> drivers/gpu/drm/i915/intel_vbt_defs.h | 2 ++ > >> 2 files changed, 7 insertions(+), 3 deletions(-) > >> > >> diff --git a/drivers/gpu/drm/i915/intel_bios.c > >> b/drivers/gpu/drm/i915/intel_bios.c > >> index 51108ffc28d1..b820d595ebc8 100644 > >> --- a/drivers/gpu/drm/i915/intel_bios.c > >> +++ b/drivers/gpu/drm/i915/intel_bios.c > >> @@ -1323,11 +1323,13 @@ parse_general_definitions(struct drm_i915_private > >> *dev_priv, > >> expected_size = LEGACY_CHILD_DEVICE_CONFIG_SIZE; > >> } else if (bdb->version == 195) { > >> expected_size = 37; > >> - } else if (bdb->version <= 197) { > >> + } else if (bdb->version <= 215) { > >> expected_size = 38; > >> + } else if (bdb->version <= 216) { > >> + expected_size = 39; > >> } else { > >> - expected_size = 38; > >> - BUILD_BUG_ON(sizeof(*child) < 38); > >> + expected_size = sizeof(*child); > >> + BUILD_BUG_ON(sizeof(*child) < 39); > >> DRM_DEBUG_DRIVER("Expected child device config size for VBT > >> version %u not known; assuming %u\n", > >> bdb->version, expected_size); > >> } > >> diff --git a/drivers/gpu/drm/i915/intel_vbt_defs.h > >> b/drivers/gpu/drm/i915/intel_vbt_defs.h > >> index e3d7745a9151..bbb173e116b3 100644 > >> --- a/drivers/gpu/drm/i915/intel_vbt_defs.h > >> +++ b/drivers/gpu/drm/i915/intel_vbt_defs.h > >> @@ -412,6 +412,8 @@ struct child_device_config { > >> u16 dp_gpio_pin_num; /* 195 */ > >> u8 dp_iboost_level:4; /* 196 */ > >> u8 hdmi_iboost_level:4; /* 196 */ > >> + u8 dp_max_link_rate_reserved:6; /* 216 */ > >> + u8 dp_max_link_rate:2; /* 216 CNL+ */ > > > > Isn't the bitorder wrong here? > > *facepalm*
Maybe we should add a comment specifying how we expect them bitfields to work here. I can never remember which way they go. -- Ville Syrjälä Intel OTC _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
