Move the storage of the runtime discovery of EDRAM to
intel_device_runtime_info so that we include it in all the relevant error
state dumping and debugging.

In the process, we introduce a new intel_device_runtime_info for storing
all the write-once information about the device (as opposed to the
static information we can determine from PCI-ID).

add/remove: 1/0 grow/shrink: 5/2 up/down: 119/-2 (117)
Function                                     old     new   delta
i915_error_state_to_str                     4553    4613     +60
intel_device_runtime_info_print                -      25     +25
i915_capabilities                            215     230     +15
capture                                     6160    6173     +13
intel_uncore_init                           1359    1364      +5
g4x_pre_enable_dp                            398     399      +1
ring_request_alloc                          1918    1917      -1
intel_engine_lookup_user                      72      71      -1
Total: Before=1331180, After=1331297, chg +0.01%

Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/i915_debugfs.c      |  1 +
 drivers/gpu/drm/i915/i915_drv.h          | 14 ++++++++++----
 drivers/gpu/drm/i915/i915_gpu_error.c    |  7 +++++++
 drivers/gpu/drm/i915/intel_device_info.c |  6 ++++++
 drivers/gpu/drm/i915/intel_device_info.h |  7 +++++++
 drivers/gpu/drm/i915/intel_uncore.c      |  8 +++-----
 6 files changed, 34 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c 
b/drivers/gpu/drm/i915/i915_debugfs.c
index 2d58a1f951b7..d973e59464e2 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -49,6 +49,7 @@ static int i915_capabilities(struct seq_file *m, void *data)
 
        intel_device_info_dump_flags(info, &p);
        intel_device_info_dump_runtime(info, &p);
+       intel_device_runtime_info_print(&dev_priv->device_runtime, &p);
        intel_driver_caps_print(&dev_priv->caps, &p);
 
        kernel_param_lock(THIS_MODULE);
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index d6aeb855e14d..0f0ecf77b546 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -472,6 +472,7 @@ struct i915_gpu_state {
        u32 reset_count;
        u32 suspend_count;
        struct intel_device_static_info device_static;
+       struct intel_device_runtime_info device_runtime;
        struct intel_driver_caps driver_caps;
        struct i915_params params;
 
@@ -1816,6 +1817,7 @@ struct drm_i915_private {
        struct kmem_cache *priorities;
 
        const struct intel_device_static_info device_static;
+       struct intel_device_runtime_info device_runtime;
        struct intel_driver_caps caps;
 
        /**
@@ -2040,9 +2042,6 @@ struct drm_i915_private {
 
        struct intel_l3_parity l3_parity;
 
-       /* Cannot be determined by PCIID. You must always read a register. */
-       u32 edram_cap;
-
        /*
         * Protects RPS/RC6 register access and PCU communication.
         * Must be taken after struct_mutex if nested. Note that
@@ -2540,7 +2539,14 @@ device_info(const struct drm_i915_private *dev_priv)
        return &dev_priv->device_static;
 }
 
+static inline const struct intel_device_runtime_info *
+runtime_info(const struct drm_i915_private *dev_priv)
+{
+       return &dev_priv->device_runtime;
+}
+
 #define DEVICE_INFO(dev_priv)  device_info((dev_priv))
+#define RUNTIME_INFO(dev_priv) runtime_info((dev_priv))
 
 #define INTEL_GEN(dev_priv)    (DEVICE_INFO(dev_priv)->gen)
 #define INTEL_DEVID(dev_priv)  (DEVICE_INFO(dev_priv)->device_id)
@@ -2746,7 +2752,7 @@ device_info(const struct drm_i915_private *dev_priv)
 
 #define HAS_LLC(dev_priv)      (DEVICE_INFO(dev_priv)->has_llc)
 #define HAS_SNOOP(dev_priv)    (DEVICE_INFO(dev_priv)->has_snoop)
-#define HAS_EDRAM(dev_priv)    (!!((dev_priv)->edram_cap & EDRAM_ENABLED))
+#define HAS_EDRAM(dev_priv)    (!!(RUNTIME_INFO(dev_priv)->edram & 
EDRAM_ENABLED))
 #define HAS_WT(dev_priv)       ((IS_HASWELL(dev_priv) || \
                                 IS_BROADWELL(dev_priv)) && HAS_EDRAM(dev_priv))
 
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c 
b/drivers/gpu/drm/i915/i915_gpu_error.c
index bc4e9a78988c..5fce4fb1bd54 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -583,7 +583,13 @@ static void err_print_capabilities(struct 
drm_i915_error_state_buf *m,
 {
        struct drm_printer p = i915_error_printer(m);
 
+       drm_printf(&p, "Device info:\n");
        intel_device_info_dump_flags(&error->device_static, &p);
+
+       drm_printf(&p, "Runtime info:\n");
+       intel_device_runtime_info_print(&error->device_runtime, &p);
+
+       drm_printf(&p, "Driver caps:\n");
        intel_driver_caps_print(&error->driver_caps, &p);
 }
 
@@ -1739,6 +1745,7 @@ static void i915_capture_gen_state(struct 
drm_i915_private *dev_priv,
        error->suspend_count = dev_priv->suspend_count;
 
        error->device_static = *DEVICE_INFO(dev_priv);
+       error->device_runtime = *RUNTIME_INFO(dev_priv);
        error->driver_caps = dev_priv->caps;
 }
 
diff --git a/drivers/gpu/drm/i915/intel_device_info.c 
b/drivers/gpu/drm/i915/intel_device_info.c
index 171240966b71..32a5d4b99510 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -587,6 +587,12 @@ void intel_device_info_runtime_init(struct 
intel_device_static_info *info)
        info->cs_timestamp_frequency_khz = read_timestamp_frequency(dev_priv);
 }
 
+void intel_device_runtime_info_print(const struct intel_device_runtime_info 
*info,
+                                    struct drm_printer *p)
+{
+       drm_printf(p, "EDRAM: %x\n", info->edram);
+}
+
 void intel_driver_caps_print(const struct intel_driver_caps *caps,
                             struct drm_printer *p)
 {
diff --git a/drivers/gpu/drm/i915/intel_device_info.h 
b/drivers/gpu/drm/i915/intel_device_info.h
index 48c97cb9ba46..4ffdac07760f 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -167,6 +167,10 @@ struct intel_device_static_info {
        } color;
 };
 
+struct intel_device_runtime_info { /* device info probed at runtime */
+       u32 edram; /* Cannot be determined by PCIID, only from a register. */
+};
+
 struct intel_driver_caps {
        unsigned int scheduler;
 };
@@ -186,6 +190,9 @@ void intel_device_info_dump_flags(const struct 
intel_device_static_info *info,
 void intel_device_info_dump_runtime(const struct intel_device_static_info 
*info,
                                    struct drm_printer *p);
 
+void intel_device_runtime_info_print(const struct intel_device_runtime_info 
*info,
+                                    struct drm_printer *p);
+
 void intel_driver_caps_print(const struct intel_driver_caps *caps,
                             struct drm_printer *p);
 
diff --git a/drivers/gpu/drm/i915/intel_uncore.c 
b/drivers/gpu/drm/i915/intel_uncore.c
index c5129abd2091..3db6e21524e1 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -419,7 +419,7 @@ static u64 gen9_edram_size(struct drm_i915_private 
*dev_priv)
 {
        const unsigned int ways[8] = { 4, 8, 12, 16, 16, 16, 16, 16 };
        const unsigned int sets[4] = { 1, 1, 2, 2 };
-       const u32 cap = dev_priv->edram_cap;
+       const u32 cap = RUNTIME_INFO(dev_priv)->edram;
 
        return EDRAM_NUM_BANKS(cap) *
                ways[EDRAM_WAYS_IDX(cap)] *
@@ -446,13 +446,11 @@ static void intel_uncore_edram_detect(struct 
drm_i915_private *dev_priv)
        if (IS_HASWELL(dev_priv) ||
            IS_BROADWELL(dev_priv) ||
            INTEL_GEN(dev_priv) >= 9) {
-               dev_priv->edram_cap = __raw_i915_read32(dev_priv,
-                                                       HSW_EDRAM_CAP);
+               dev_priv->device_runtime.edram =
+                       __raw_i915_read32(dev_priv, HSW_EDRAM_CAP);
 
                /* NB: We can't write IDICR yet because we do not have gt funcs
                 * set up */
-       } else {
-               dev_priv->edram_cap = 0;
        }
 
        if (HAS_EDRAM(dev_priv))
-- 
2.16.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Reply via email to