Quoting Lionel Landwerlin (2019-06-27 10:01:14) > When a register is readonly there is not much we can tell about its > value (apart from its default value?). This can be covered by tests > exercising the value of the register from userspace. > > For PS_INVOCATION_COUNT we've got the following piglit tests : > > > KHR-GL45.pipeline_statistics_query_tests_ARB.functional_fragment_shader_invocations > > Vulkan CTS tests : > > dEQP-VK.query_pool.statistics_query.fragment_shader_invocations.* > > Signed-off-by: Lionel Landwerlin <[email protected]> > --- > drivers/gpu/drm/i915/gt/selftest_workarounds.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/drivers/gpu/drm/i915/gt/selftest_workarounds.c > b/drivers/gpu/drm/i915/gt/selftest_workarounds.c > index f12cb20fe785..a06f96df1bfd 100644 > --- a/drivers/gpu/drm/i915/gt/selftest_workarounds.c > +++ b/drivers/gpu/drm/i915/gt/selftest_workarounds.c > @@ -926,6 +926,9 @@ check_whitelisted_registers(struct intel_engine_cs > *engine, > > err = 0; > for (i = 0; i < engine->whitelist.count; i++) { > + if (engine->whitelist.list[i].reg.reg & > RING_FORCE_TO_NONPRIV_RD)
Ville would like you to use i915_mmio_reg_offset(engine->whitelist.list[i].reg) I think we might benefit from a reg local :) -Chris _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
