On Thu, Jul 18, 2019 at 03:54:05PM +0100, Chris Wilson wrote:
> As recently disovered by forcing big-core (!llc) machines to use the GTT
> paths, we need our full GTT write flush before manipulating the GTT PTE
> or else the writes may be directed to the wrong page.
>
> Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk>
> Cc: Joonas Lahtinen <joonas.lahti...@linux.intel.com>
> Cc: Matthew Auld <matthew.william.a...@gmail.com>
> Cc: Ville Syrjälä <ville.syrj...@linux.intel.com>
> Cc: sta...@vger.kernel.org
> ---
> drivers/gpu/drm/i915/i915_gem.c | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index fed0bc421a55..c6ba350e6e4f 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -610,7 +610,8 @@ i915_gem_gtt_pwrite_fast(struct drm_i915_gem_object *obj,
> unsigned int page_length = PAGE_SIZE - page_offset;
> page_length = remain < page_length ? remain : page_length;
> if (node.allocated) {
> - wmb(); /* flush the write before we modify the GGTT */
> + /* flush the write before we modify the GGTT */
> + intel_gt_flush_ggtt_writes(ggtt->vm.gt);
Matches the story told by intel_gt_flush_ggtt_writes().
Reviewed-by: Ville Syrjälä <ville.syrj...@linux.intel.com>
> ggtt->vm.insert_page(&ggtt->vm,
>
> i915_gem_object_get_dma_address(obj, offset >> PAGE_SHIFT),
> node.start, I915_CACHE_NONE, 0);
> @@ -639,8 +640,8 @@ i915_gem_gtt_pwrite_fast(struct drm_i915_gem_object *obj,
> i915_gem_object_unlock_fence(obj, fence);
> out_unpin:
> mutex_lock(&i915->drm.struct_mutex);
> + intel_gt_flush_ggtt_writes(ggtt->vm.gt);
> if (node.allocated) {
> - wmb();
> ggtt->vm.clear_range(&ggtt->vm, node.start, node.size);
> remove_mappable_node(&node);
> } else {
> --
> 2.22.0
--
Ville Syrjälä
Intel
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