On 28/02/2020 00:01, José Roberto de Souza wrote:
Just to make easier to check that the Wa was implemetend when
comparing to the number in BSpec.
BSpec: 52890
Signed-off-by: José Roberto de Souza <jose.so...@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwer...@intel.com>
---
drivers/gpu/drm/i915/gt/intel_workarounds.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c
b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index ba0265763484..3e375a3b7714 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -1254,6 +1254,7 @@ static void tgl_whitelist_build(struct intel_engine_cs
*engine)
case RENDER_CLASS:
/*
* WaAllowPMDepthAndInvocationCountAccessFromUMD:tgl
+ * Wa_1408556865:tgl
*
* This covers 4 registers which are next to one another :
* - PS_INVOCATION_COUNT
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