On Tue, 25 Jun 2013 19:21:03 +0300
[email protected] wrote:

> From: Ville Syrjälä <[email protected]>
> 
> Don't do needless udelay() calls if the Punit already completed
> the frequency change.
> 
> Also double check things after the timeout to make sure the timeout
> wasn't just caused by some scheduling delays.
> 
> Signed-off-by: Ville Syrjälä <[email protected]>
> ---
>  drivers/gpu/drm/i915/intel_pm.c | 14 ++++++++++----
>  1 file changed, 10 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 6dbcad7..6b98d45 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -3078,14 +3078,20 @@ static void vlv_update_rps_cur_delay(struct 
> drm_i915_private *dev_priv)
>  
>       WARN_ON(!mutex_is_locked(&dev_priv->rps.hw_lock));
>  
> -     do {
> -             pval = vlv_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS);
> +     pval = vlv_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS);
> +
> +     while (pval & 1) {
>               if (time_after(jiffies, timeout)) {
> -                     DRM_DEBUG_DRIVER("timed out waiting for Punit\n");
> +                     pval = vlv_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS);
>                       break;
>               }
> +
>               udelay(10);
> -     } while (pval & 1);
> +             pval = vlv_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS);
> +     }
> +
> +     if (pval & 1)
> +             DRM_DEBUG_DRIVER("timed out waiting for Punit\n");
>  
>       pval >>= 8;
>  

Reviewed-by: Jesse Barnes <[email protected]>

-- 
Jesse Barnes, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
[email protected]
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Reply via email to