On Sat, Jul 06, 2013 at 12:52:05PM +0200, Daniel Vetter wrote: > I've missed that intel_dvo_mode_set changes the dpll configuration. > Hence when I've reworked the sequence to only enable the dpll in the > crtc_enable callback in > > commit 66e3d5c09940d08d94b03e65b420fadaa7484318 > Author: Daniel Vetter <[email protected]> > Date: Sun Jun 16 21:24:16 2013 +0200 > > drm/i915: move i9xx dpll enabling into crtc enable function > > that special DVO bit was lost. Some BSpec reading confirms that it's > only needed for DVO encoders. Section 1.5.4, "DPLL A Control Register" > for bit 30: > > "2X Clock Enable. When driving In non-gang DVO modes such as a > connected flat panel or TV, a 2X" version of the clock is needed. When > not using the 2X output it should be disabled. This bit cannot be set > when driving the integrated LVDS port on devices such as Montara-GM." > > Fitx this regression up. > > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=66516 > Cc: Chris Wilson <[email protected]> > Reported-by: Chris Wilson <[email protected]> > Signed-off-by: Daniel Vetter <[email protected]>
Reviewed-by: Chris Wilson <[email protected]> As it doesn't fix the bug in isolation, Partially-tested-by: Chris Wilson <[email protected]> -Chris -- Chris Wilson, Intel Open Source Technology Centre _______________________________________________ Intel-gfx mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/intel-gfx
