On Thu, Jul 11, 2013 at 06:44:59PM -0300, Rodrigo Vivi wrote: > Adding support for PSR Status, PSR entry counter and performance counters. > Heavily based on initial work from Shobhit. > > v2: Fix PSR Status Link bits by Paulo Zanoni. > v3: Prefer seq_puts to seq_printf by Paulo Zanoni. > v4: Fix identation by Paulo Zanoni. > v5: Return earlier if it isn't Haswell in order to avoid reading non-existing > registers - by Paulo Zanoni. > > CC: Paulo Zanoni <[email protected]> > Reviewed-by: Paulo Zanoni <[email protected]> > Credits-by: Shobhit Kumar <[email protected]> > Signed-off-by: Rodrigo Vivi <[email protected]> > --- > drivers/gpu/drm/i915/i915_debugfs.c | 95 > +++++++++++++++++++++++++++++++++++++ > drivers/gpu/drm/i915/i915_reg.h | 24 ++++++++++ > 2 files changed, 119 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_debugfs.c > b/drivers/gpu/drm/i915/i915_debugfs.c > index d413812..fe3cd5a 100644 > --- a/drivers/gpu/drm/i915/i915_debugfs.c > +++ b/drivers/gpu/drm/i915/i915_debugfs.c > @@ -1943,6 +1943,100 @@ static int i915_dpio_info(struct seq_file *m, void > *data) > return 0; > } > > +static int i915_edp_psr_status(struct seq_file *m, void *data) > +{ > + struct drm_info_node *node = m->private; > + struct drm_device *dev = node->minor->dev; > + struct drm_i915_private *dev_priv = dev->dev_private; > + u32 psrctl, psrstat, psrperf; > + > + if (!IS_HASWELL(dev)) {
Introduce a HAS_PSR(dev) > + seq_puts(m, "PSR not supported on this platform\n"); > + return 0; > + } > + > + psrctl = I915_READ(EDP_PSR_CTL); Missing locking. -Chris -- Chris Wilson, Intel Open Source Technology Centre _______________________________________________ Intel-gfx mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/intel-gfx
