On Thu, Aug 08, 2013 at 08:00:25PM +0100, Chris Wilson wrote:
> A later patch adds yet another workaround for MI_SET_CONTEXT, at which
> point we start to end up with more NOOPs than actual command dwords
> along the non-workaround paths. It is time that we made the MI_SET_CONTEXT
> a variable length block and only emit the dwords we truly need.
>
> Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk>
> Reviewed-by: Ben Widawsky <b...@bwidawsk.net>
Since this seems to be based on top of gen5 context support: Care to slap
an r-b and tested-by onto it so that I can merge the entire shebang?
Cheers, Daniel
> ---
> drivers/gpu/drm/i915/i915_gem_context.c | 17 +++++++++--------
> 1 file changed, 9 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_context.c
> b/drivers/gpu/drm/i915/i915_gem_context.c
> index 879bfa2..8a7b61e 100644
> --- a/drivers/gpu/drm/i915/i915_gem_context.c
> +++ b/drivers/gpu/drm/i915/i915_gem_context.c
> @@ -348,7 +348,7 @@ mi_set_context(struct intel_ring_buffer *ring,
> struct i915_hw_context *new_context,
> u32 hw_flags)
> {
> - int ret;
> + int ret, len;
>
> /* w/a: If Flush TLB Invalidation Mode is enabled, driver must do a TLB
> * invalidation prior to MI_SET_CONTEXT. On GEN6 we don't set the value
> @@ -361,7 +361,14 @@ mi_set_context(struct intel_ring_buffer *ring,
> return ret;
> }
>
> - ret = intel_ring_begin(ring, 6);
> + len = 4;
> + switch (INTEL_INFO(ring->dev)->gen) {
> + case 7:
> + case 5: len += 2;
> + break;
> + }
> +
> + ret = intel_ring_begin(ring, len);
> if (ret)
> return ret;
>
> @@ -373,9 +380,6 @@ mi_set_context(struct intel_ring_buffer *ring,
> case 5:
> intel_ring_emit(ring, MI_SUSPEND_FLUSH | MI_SUSPEND_FLUSH_EN);
> break;
> - default:
> - intel_ring_emit(ring, MI_NOOP);
> - break;
> }
>
> intel_ring_emit(ring, MI_NOOP);
> @@ -395,9 +399,6 @@ mi_set_context(struct intel_ring_buffer *ring,
> case 5:
> intel_ring_emit(ring, MI_SUSPEND_FLUSH);
> break;
> - default:
> - intel_ring_emit(ring, MI_NOOP);
> - break;
> }
>
> intel_ring_advance(ring);
> --
> 1.8.4.rc1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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