Ben complained in his review of write RING_TAIL once per request that intel_ring_advance() did nothing and was confusing with __intel_ring_advance() doing the hard work. This patch drops the intel_ring_advance(), and renames __intel_ring_advance() to intel_ring_commit(). We go one step further and rename intel_ring_begin() to intel_ring_get_space() so that the asymmetry looks less startling.
The advantage of intel_ring_begin()/intel_ring_advance() is that that demarcated a known number of dword writes to the ring, with the intention of making it easier for the reviewer to check the count. The advantage of intel_ring_get_space(), ..., intel_ring_commit() is that the relaxed rules on the TAIL write are more obvious. There is no implicit nop (intel_ring_advance) to befuddle the reader. If the commands need to be emitter immediate, the reader knows to look for an explicit intel_ring_commit(). Signed-off-by: Chris Wilson <[email protected]> --- drivers/gpu/drm/i915/i915_dma.c | 4 +- drivers/gpu/drm/i915/i915_gem_context.c | 7 +-- drivers/gpu/drm/i915/i915_gem_exec.c | 4 +- drivers/gpu/drm/i915/i915_gem_execbuffer.c | 9 +-- drivers/gpu/drm/i915/intel_display.c | 20 +++---- drivers/gpu/drm/i915/intel_overlay.c | 12 ++-- drivers/gpu/drm/i915/intel_ringbuffer.c | 82 +++++++++++----------------- drivers/gpu/drm/i915/intel_ringbuffer.h | 8 +-- 8 files changed, 58 insertions(+), 88 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c index c0fb23e..fb50467 100644 --- a/drivers/gpu/drm/i915/i915_dma.c +++ b/drivers/gpu/drm/i915/i915_dma.c @@ -46,13 +46,13 @@ #define LP_RING(d) (&((struct drm_i915_private *)(d))->ring[RCS]) #define BEGIN_LP_RING(n) \ - intel_ring_begin(LP_RING(dev_priv), (n)) + intel_ring_get_space(LP_RING(dev_priv), (n)) #define OUT_RING(x) \ intel_ring_emit(LP_RING(dev_priv), x) #define ADVANCE_LP_RING() \ - __intel_ring_advance(LP_RING(dev_priv)) + intel_ring_commit(LP_RING(dev_priv)) /** * Lock test for when it's just for synchronization of ring access. diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c index fae2f4d..729b1bb 100644 --- a/drivers/gpu/drm/i915/i915_gem_context.c +++ b/drivers/gpu/drm/i915/i915_gem_context.c @@ -370,7 +370,7 @@ mi_set_context(struct intel_ring_buffer *ring, if (!new_context->is_initialized) len += 2; - ret = intel_ring_begin(ring, len); + ret = intel_ring_get_space(ring, len); if (ret) return ret; @@ -419,10 +419,7 @@ mi_set_context(struct intel_ring_buffer *ring, break; } - intel_ring_advance(ring); - - return ret; - + return 0; } static int do_switch(struct i915_hw_context *to) diff --git a/drivers/gpu/drm/i915/i915_gem_exec.c b/drivers/gpu/drm/i915/i915_gem_exec.c index 4da3704..2d434b2 100644 --- a/drivers/gpu/drm/i915/i915_gem_exec.c +++ b/drivers/gpu/drm/i915/i915_gem_exec.c @@ -100,7 +100,7 @@ int i915_gem_exec_clear_object(struct drm_i915_gem_object *obj) if (ret) goto unpin; - ret = intel_ring_begin(ring, 6); + ret = intel_ring_get_space(ring, 6); if (ret) goto unpin; @@ -111,7 +111,7 @@ int i915_gem_exec_clear_object(struct drm_i915_gem_object *obj) intel_ring_emit(ring, 0); intel_ring_emit(ring, MI_NOOP); - __intel_ring_advance(ring); + intel_ring_commit(ring); i915_gem_exec_dirty_object(obj, ring); unpin: diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c index 9b7785d..ca0a2f5 100644 --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c @@ -899,7 +899,7 @@ i915_reset_gen7_sol_offsets(struct drm_device *dev, if (!IS_GEN7(dev) || ring != &dev_priv->ring[RCS]) return 0; - ret = intel_ring_begin(ring, 4 * 3); + ret = intel_ring_get_space(ring, 4 * 3); if (ret) return ret; @@ -909,8 +909,6 @@ i915_reset_gen7_sol_offsets(struct drm_device *dev, intel_ring_emit(ring, 0); } - intel_ring_advance(ring); - return 0; } @@ -1121,15 +1119,14 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data, if (ring == &dev_priv->ring[RCS] && mode != dev_priv->relative_constants_mode) { - ret = intel_ring_begin(ring, 4); + ret = intel_ring_get_space(ring, 4); if (ret) - goto err; + goto err; intel_ring_emit(ring, MI_NOOP); intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(1)); intel_ring_emit(ring, INSTPM); intel_ring_emit(ring, mask << 16 | mode); - intel_ring_advance(ring); dev_priv->relative_constants_mode = mode; } diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 5741fd8..0ac8645 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -7668,7 +7668,7 @@ static int intel_gen2_queue_flip(struct drm_device *dev, if (ret) goto err; - ret = intel_ring_begin(ring, 6); + ret = intel_ring_get_space(ring, 6); if (ret) goto err_unpin; @@ -7688,7 +7688,7 @@ static int intel_gen2_queue_flip(struct drm_device *dev, intel_ring_emit(ring, 0); /* aux display base address, unused */ intel_mark_page_flip_active(intel_crtc); - __intel_ring_advance(ring); + intel_ring_commit(ring); return 0; err_unpin: @@ -7712,7 +7712,7 @@ static int intel_gen3_queue_flip(struct drm_device *dev, if (ret) goto err; - ret = intel_ring_begin(ring, 6); + ret = intel_ring_get_space(ring, 6); if (ret) goto err_unpin; @@ -7729,7 +7729,7 @@ static int intel_gen3_queue_flip(struct drm_device *dev, intel_ring_emit(ring, MI_NOOP); intel_mark_page_flip_active(intel_crtc); - __intel_ring_advance(ring); + intel_ring_commit(ring); return 0; err_unpin: @@ -7753,7 +7753,7 @@ static int intel_gen4_queue_flip(struct drm_device *dev, if (ret) goto err; - ret = intel_ring_begin(ring, 4); + ret = intel_ring_get_space(ring, 4); if (ret) goto err_unpin; @@ -7777,7 +7777,7 @@ static int intel_gen4_queue_flip(struct drm_device *dev, intel_ring_emit(ring, pf | pipesrc); intel_mark_page_flip_active(intel_crtc); - __intel_ring_advance(ring); + intel_ring_commit(ring); return 0; err_unpin: @@ -7801,7 +7801,7 @@ static int intel_gen6_queue_flip(struct drm_device *dev, if (ret) goto err; - ret = intel_ring_begin(ring, 4); + ret = intel_ring_get_space(ring, 4); if (ret) goto err_unpin; @@ -7821,7 +7821,7 @@ static int intel_gen6_queue_flip(struct drm_device *dev, intel_ring_emit(ring, pf | pipesrc); intel_mark_page_flip_active(intel_crtc); - __intel_ring_advance(ring); + intel_ring_commit(ring); return 0; err_unpin: @@ -7869,7 +7869,7 @@ static int intel_gen7_queue_flip(struct drm_device *dev, if (ring->id == RCS) len += 6; - ret = intel_ring_begin(ring, len); + ret = intel_ring_get_space(ring, len); if (ret) goto err_unpin; @@ -7899,7 +7899,7 @@ static int intel_gen7_queue_flip(struct drm_device *dev, intel_ring_emit(ring, (MI_NOOP)); intel_mark_page_flip_active(intel_crtc); - __intel_ring_advance(ring); + intel_ring_commit(ring); return 0; err_unpin: diff --git a/drivers/gpu/drm/i915/intel_overlay.c b/drivers/gpu/drm/i915/intel_overlay.c index bf4da6e..91d5917 100644 --- a/drivers/gpu/drm/i915/intel_overlay.c +++ b/drivers/gpu/drm/i915/intel_overlay.c @@ -245,7 +245,7 @@ static int intel_overlay_on(struct intel_overlay *overlay) WARN_ON(IS_I830(dev) && !(dev_priv->quirks & QUIRK_PIPEA_FORCE)); - ret = intel_ring_begin(ring, 4); + ret = intel_ring_get_space(ring, 4); if (ret) return ret; @@ -253,7 +253,6 @@ static int intel_overlay_on(struct intel_overlay *overlay) intel_ring_emit(ring, overlay->flip_addr | OFC_UPDATE); intel_ring_emit(ring, MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP); intel_ring_emit(ring, MI_NOOP); - intel_ring_advance(ring); return intel_overlay_do_wait_request(overlay, NULL); } @@ -279,13 +278,12 @@ static int intel_overlay_continue(struct intel_overlay *overlay, if (tmp & (1 << 17)) DRM_DEBUG("overlay underrun, DOVSTA: %x\n", tmp); - ret = intel_ring_begin(ring, 2); + ret = intel_ring_get_space(ring, 2); if (ret) return ret; intel_ring_emit(ring, MI_OVERLAY_FLIP | MI_OVERLAY_CONTINUE); intel_ring_emit(ring, flip_addr); - intel_ring_advance(ring); return i915_add_request(ring, &overlay->last_flip_req); } @@ -333,7 +331,7 @@ static int intel_overlay_off(struct intel_overlay *overlay) * of the hw. Do it in both cases */ flip_addr |= OFC_UPDATE; - ret = intel_ring_begin(ring, 6); + ret = intel_ring_get_space(ring, 6); if (ret) return ret; @@ -353,7 +351,6 @@ static int intel_overlay_off(struct intel_overlay *overlay) intel_ring_emit(ring, flip_addr); intel_ring_emit(ring, MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP); } - intel_ring_advance(ring); return intel_overlay_do_wait_request(overlay, intel_overlay_off_tail); } @@ -401,13 +398,12 @@ static int intel_overlay_release_old_vid(struct intel_overlay *overlay) if (I915_READ(ISR) & I915_OVERLAY_PLANE_FLIP_PENDING_INTERRUPT) { /* synchronous slowpath */ - ret = intel_ring_begin(ring, 2); + ret = intel_ring_get_space(ring, 2); if (ret) return ret; intel_ring_emit(ring, MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP); intel_ring_emit(ring, MI_NOOP); - intel_ring_advance(ring); ret = intel_overlay_do_wait_request(overlay, intel_overlay_release_old_vid_tail); diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c index 7fa52bd..593e82f 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.c +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c @@ -41,7 +41,7 @@ static inline int ring_space(struct intel_ring_buffer *ring) return space; } -void __intel_ring_advance(struct intel_ring_buffer *ring) +void intel_ring_commit(struct intel_ring_buffer *ring) { struct drm_i915_private *dev_priv = ring->dev->dev_private; @@ -66,13 +66,13 @@ gen2_render_ring_flush(struct intel_ring_buffer *ring, if (invalidate_domains & I915_GEM_DOMAIN_SAMPLER) cmd |= MI_READ_FLUSH; - ret = intel_ring_begin(ring, 2); + ret = intel_ring_get_space(ring, 2); if (ret) return ret; intel_ring_emit(ring, cmd); intel_ring_emit(ring, MI_NOOP); - intel_ring_advance(ring); + intel_ring_commit(ring); return 0; } @@ -124,13 +124,12 @@ gen4_render_ring_flush(struct intel_ring_buffer *ring, (IS_G4X(dev) || IS_GEN5(dev))) cmd |= MI_INVALIDATE_ISP; - ret = intel_ring_begin(ring, 2); + ret = intel_ring_get_space(ring, 2); if (ret) return ret; intel_ring_emit(ring, cmd); intel_ring_emit(ring, MI_NOOP); - intel_ring_advance(ring); return 0; } @@ -178,8 +177,7 @@ intel_emit_post_sync_nonzero_flush(struct intel_ring_buffer *ring) u32 scratch_addr = ring->scratch.gtt_offset + 128; int ret; - - ret = intel_ring_begin(ring, 6); + ret = intel_ring_get_space(ring, 6); if (ret) return ret; @@ -190,9 +188,8 @@ intel_emit_post_sync_nonzero_flush(struct intel_ring_buffer *ring) intel_ring_emit(ring, 0); /* low dword */ intel_ring_emit(ring, 0); /* high dword */ intel_ring_emit(ring, MI_NOOP); - intel_ring_advance(ring); - ret = intel_ring_begin(ring, 6); + ret = intel_ring_get_space(ring, 6); if (ret) return ret; @@ -202,7 +199,6 @@ intel_emit_post_sync_nonzero_flush(struct intel_ring_buffer *ring) intel_ring_emit(ring, 0); intel_ring_emit(ring, 0); intel_ring_emit(ring, MI_NOOP); - intel_ring_advance(ring); return 0; } @@ -246,7 +242,7 @@ gen6_render_ring_flush(struct intel_ring_buffer *ring, flags |= PIPE_CONTROL_QW_WRITE | PIPE_CONTROL_CS_STALL; } - ret = intel_ring_begin(ring, 4); + ret = intel_ring_get_space(ring, 4); if (ret) return ret; @@ -254,7 +250,6 @@ gen6_render_ring_flush(struct intel_ring_buffer *ring, intel_ring_emit(ring, flags); intel_ring_emit(ring, scratch_addr | PIPE_CONTROL_GLOBAL_GTT); intel_ring_emit(ring, 0); - intel_ring_advance(ring); return 0; } @@ -264,7 +259,7 @@ gen7_render_ring_cs_stall_wa(struct intel_ring_buffer *ring) { int ret; - ret = intel_ring_begin(ring, 4); + ret = intel_ring_get_space(ring, 4); if (ret) return ret; @@ -273,7 +268,6 @@ gen7_render_ring_cs_stall_wa(struct intel_ring_buffer *ring) PIPE_CONTROL_STALL_AT_SCOREBOARD); intel_ring_emit(ring, 0); intel_ring_emit(ring, 0); - intel_ring_advance(ring); return 0; } @@ -285,7 +279,7 @@ static int gen7_ring_fbc_flush(struct intel_ring_buffer *ring, u32 value) if (!ring->fbc_dirty) return 0; - ret = intel_ring_begin(ring, 4); + ret = intel_ring_get_space(ring, 4); if (ret) return ret; intel_ring_emit(ring, MI_NOOP); @@ -293,7 +287,6 @@ static int gen7_ring_fbc_flush(struct intel_ring_buffer *ring, u32 value) intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(1)); intel_ring_emit(ring, MSG_FBC_REND_STATE); intel_ring_emit(ring, value); - intel_ring_advance(ring); ring->fbc_dirty = false; return 0; @@ -344,7 +337,7 @@ gen7_render_ring_flush(struct intel_ring_buffer *ring, gen7_render_ring_cs_stall_wa(ring); } - ret = intel_ring_begin(ring, 4); + ret = intel_ring_get_space(ring, 4); if (ret) return ret; @@ -352,7 +345,6 @@ gen7_render_ring_flush(struct intel_ring_buffer *ring, intel_ring_emit(ring, flags); intel_ring_emit(ring, scratch_addr); intel_ring_emit(ring, 0); - intel_ring_advance(ring); if (flush_domains) return gen7_ring_fbc_flush(ring, FBC_REND_NUKE); @@ -624,9 +616,8 @@ gen6_add_request(struct intel_ring_buffer *ring) struct intel_ring_buffer *useless; int i, ret; - ret = intel_ring_begin(ring, ((I915_NUM_RINGS-1) * - MBOX_UPDATE_DWORDS) + - 4); + ret = intel_ring_get_space(ring, + (I915_NUM_RINGS-1) * MBOX_UPDATE_DWORDS + 4); if (ret) return ret; #undef MBOX_UPDATE_DWORDS @@ -641,7 +632,7 @@ gen6_add_request(struct intel_ring_buffer *ring) intel_ring_emit(ring, I915_GEM_HWS_INDEX << MI_STORE_DWORD_INDEX_SHIFT); intel_ring_emit(ring, ring->outstanding_lazy_request); intel_ring_emit(ring, MI_USER_INTERRUPT); - __intel_ring_advance(ring); + intel_ring_commit(ring); return 0; } @@ -679,7 +670,7 @@ gen6_ring_sync(struct intel_ring_buffer *waiter, WARN_ON(signaller->semaphore_register[waiter->id] == MI_SEMAPHORE_SYNC_INVALID); - ret = intel_ring_begin(waiter, 4); + ret = intel_ring_get_space(waiter, 4); if (ret) return ret; @@ -697,7 +688,6 @@ gen6_ring_sync(struct intel_ring_buffer *waiter, intel_ring_emit(waiter, MI_NOOP); intel_ring_emit(waiter, MI_NOOP); } - intel_ring_advance(waiter); return 0; } @@ -725,7 +715,7 @@ pc_render_add_request(struct intel_ring_buffer *ring) * incoherence by flushing the 6 PIPE_NOTIFY buffers out to * memory before requesting an interrupt. */ - ret = intel_ring_begin(ring, 32); + ret = intel_ring_get_space(ring, 32); if (ret) return ret; @@ -754,7 +744,7 @@ pc_render_add_request(struct intel_ring_buffer *ring) intel_ring_emit(ring, ring->scratch.gtt_offset | PIPE_CONTROL_GLOBAL_GTT); intel_ring_emit(ring, ring->outstanding_lazy_request); intel_ring_emit(ring, 0); - __intel_ring_advance(ring); + intel_ring_commit(ring); return 0; } @@ -952,13 +942,12 @@ bsd_ring_flush(struct intel_ring_buffer *ring, { int ret; - ret = intel_ring_begin(ring, 2); + ret = intel_ring_get_space(ring, 2); if (ret) return ret; intel_ring_emit(ring, MI_FLUSH); intel_ring_emit(ring, MI_NOOP); - intel_ring_advance(ring); return 0; } @@ -967,7 +956,7 @@ i9xx_add_request(struct intel_ring_buffer *ring) { int ret; - ret = intel_ring_begin(ring, 4); + ret = intel_ring_get_space(ring, 4); if (ret) return ret; @@ -975,7 +964,7 @@ i9xx_add_request(struct intel_ring_buffer *ring) intel_ring_emit(ring, I915_GEM_HWS_INDEX << MI_STORE_DWORD_INDEX_SHIFT); intel_ring_emit(ring, ring->outstanding_lazy_request); intel_ring_emit(ring, MI_USER_INTERRUPT); - __intel_ring_advance(ring); + intel_ring_commit(ring); return 0; } @@ -1076,7 +1065,7 @@ i965_dispatch_execbuffer(struct intel_ring_buffer *ring, { int ret; - ret = intel_ring_begin(ring, 2); + ret = intel_ring_get_space(ring, 2); if (ret) return ret; @@ -1085,7 +1074,6 @@ i965_dispatch_execbuffer(struct intel_ring_buffer *ring, MI_BATCH_GTT | (flags & I915_DISPATCH_SECURE ? 0 : MI_BATCH_NON_SECURE_I965)); intel_ring_emit(ring, offset); - intel_ring_advance(ring); return 0; } @@ -1100,7 +1088,7 @@ i830_dispatch_execbuffer(struct intel_ring_buffer *ring, int ret; if (flags & I915_DISPATCH_PINNED) { - ret = intel_ring_begin(ring, 4); + ret = intel_ring_get_space(ring, 4); if (ret) return ret; @@ -1108,14 +1096,13 @@ i830_dispatch_execbuffer(struct intel_ring_buffer *ring, intel_ring_emit(ring, offset | (flags & I915_DISPATCH_SECURE ? 0 : MI_BATCH_NON_SECURE)); intel_ring_emit(ring, offset + len - 8); intel_ring_emit(ring, MI_NOOP); - intel_ring_advance(ring); } else { u32 cs_offset = ring->scratch.gtt_offset; if (len > I830_BATCH_LIMIT) return -ENOSPC; - ret = intel_ring_begin(ring, 9+3); + ret = intel_ring_get_space(ring, 9+3); if (ret) return ret; /* Blit the batch (which has now all relocs applied) to the stable batch @@ -1137,7 +1124,6 @@ i830_dispatch_execbuffer(struct intel_ring_buffer *ring, intel_ring_emit(ring, MI_BATCH_BUFFER); intel_ring_emit(ring, cs_offset | (flags & I915_DISPATCH_SECURE ? 0 : MI_BATCH_NON_SECURE)); intel_ring_emit(ring, cs_offset + len - 8); - intel_ring_advance(ring); } return 0; @@ -1150,13 +1136,12 @@ i915_dispatch_execbuffer(struct intel_ring_buffer *ring, { int ret; - ret = intel_ring_begin(ring, 2); + ret = intel_ring_get_space(ring, 2); if (ret) return ret; intel_ring_emit(ring, MI_BATCH_BUFFER_START | MI_BATCH_GTT); intel_ring_emit(ring, offset | (flags & I915_DISPATCH_SECURE ? 0 : MI_BATCH_NON_SECURE)); - intel_ring_advance(ring); return 0; } @@ -1423,7 +1408,7 @@ static int ring_wait_for_space(struct intel_ring_buffer *ring, int n) return ret; /* force the tail write in case we have been skipping them */ - __intel_ring_advance(ring); + intel_ring_commit(ring); trace_i915_ring_wait_begin(ring); /* With GEM the hangcheck timer should kick us out of the loop, @@ -1517,6 +1502,8 @@ static int __intel_ring_begin(struct intel_ring_buffer *ring, { int ret; + ring->tail &= ring->size - 1; + if (unlikely(ring->tail + bytes > ring->effective_size)) { ret = intel_wrap_ring_buffer(ring); if (unlikely(ret)) @@ -1533,8 +1520,8 @@ static int __intel_ring_begin(struct intel_ring_buffer *ring, return 0; } -int intel_ring_begin(struct intel_ring_buffer *ring, - int num_dwords) +int intel_ring_get_space(struct intel_ring_buffer *ring, + int num_dwords) { drm_i915_private_t *dev_priv = ring->dev->dev_private; int ret; @@ -1608,7 +1595,7 @@ static int gen6_bsd_ring_flush(struct intel_ring_buffer *ring, uint32_t cmd; int ret; - ret = intel_ring_begin(ring, 4); + ret = intel_ring_get_space(ring, 4); if (ret) return ret; @@ -1626,7 +1613,7 @@ static int gen6_bsd_ring_flush(struct intel_ring_buffer *ring, intel_ring_emit(ring, I915_GEM_HWS_SCRATCH_ADDR | MI_FLUSH_DW_USE_GTT); intel_ring_emit(ring, 0); intel_ring_emit(ring, MI_NOOP); - intel_ring_advance(ring); + return 0; } @@ -1637,7 +1624,7 @@ hsw_ring_dispatch_execbuffer(struct intel_ring_buffer *ring, { int ret; - ret = intel_ring_begin(ring, 2); + ret = intel_ring_get_space(ring, 2); if (ret) return ret; @@ -1646,7 +1633,6 @@ hsw_ring_dispatch_execbuffer(struct intel_ring_buffer *ring, (flags & I915_DISPATCH_SECURE ? 0 : MI_BATCH_NON_SECURE_HSW)); /* bit0-7 is the length on GEN6+ */ intel_ring_emit(ring, offset); - intel_ring_advance(ring); return 0; } @@ -1658,7 +1644,7 @@ gen6_ring_dispatch_execbuffer(struct intel_ring_buffer *ring, { int ret; - ret = intel_ring_begin(ring, 2); + ret = intel_ring_get_space(ring, 2); if (ret) return ret; @@ -1667,7 +1653,6 @@ gen6_ring_dispatch_execbuffer(struct intel_ring_buffer *ring, (flags & I915_DISPATCH_SECURE ? 0 : MI_BATCH_NON_SECURE_I965)); /* bit0-7 is the length on GEN6+ */ intel_ring_emit(ring, offset); - intel_ring_advance(ring); return 0; } @@ -1681,7 +1666,7 @@ static int gen6_ring_flush(struct intel_ring_buffer *ring, uint32_t cmd; int ret; - ret = intel_ring_begin(ring, 4); + ret = intel_ring_get_space(ring, 4); if (ret) return ret; @@ -1699,7 +1684,6 @@ static int gen6_ring_flush(struct intel_ring_buffer *ring, intel_ring_emit(ring, I915_GEM_HWS_SCRATCH_ADDR | MI_FLUSH_DW_USE_GTT); intel_ring_emit(ring, 0); intel_ring_emit(ring, MI_NOOP); - intel_ring_advance(ring); if (IS_GEN7(dev) && flush) return gen7_ring_fbc_flush(ring, FBC_REND_CACHE_CLEAN); diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h index 17b147a..183b560 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.h +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h @@ -232,18 +232,14 @@ intel_write_status_page(struct intel_ring_buffer *ring, void intel_cleanup_ring_buffer(struct intel_ring_buffer *ring); -int __must_check intel_ring_begin(struct intel_ring_buffer *ring, int n); +int __must_check intel_ring_get_space(struct intel_ring_buffer *ring, int dwords); static inline void intel_ring_emit(struct intel_ring_buffer *ring, u32 data) { iowrite32(data, ring->virtual_start + ring->tail); ring->tail += 4; } -static inline void intel_ring_advance(struct intel_ring_buffer *ring) -{ - ring->tail &= ring->size - 1; -} -void __intel_ring_advance(struct intel_ring_buffer *ring); +void intel_ring_commit(struct intel_ring_buffer *ring); int __must_check intel_ring_idle(struct intel_ring_buffer *ring); void intel_ring_init_seqno(struct intel_ring_buffer *ring, u32 seqno); -- 1.7.9.5 _______________________________________________ Intel-gfx mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/intel-gfx
