On Fri, 26 Nov 2021, Uma Shankar <uma.shan...@intel.com> wrote:
> Enable Pipe Degamma for XE_LPD. Extend the legacy implementation
> to incorparate the extended lut size for XE_LPD.
>
> v2: Added a helper for degamma lut size (Ville)
>
> Signed-off-by: Uma Shankar <uma.shan...@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_color.c | 14 +++++++++++---
>  1 file changed, 11 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_color.c 
> b/drivers/gpu/drm/i915/display/intel_color.c
> index 42fe549ef6fe..de3ded1e327a 100644
> --- a/drivers/gpu/drm/i915/display/intel_color.c
> +++ b/drivers/gpu/drm/i915/display/intel_color.c
> @@ -808,6 +808,14 @@ static void bdw_load_luts(const struct intel_crtc_state 
> *crtc_state)
>       }
>  }
>  
> +static int glk_degamma_lut_size(struct drm_i915_private *i915)
> +{
> +     if (DISPLAY_VER(i915) >= 13)
> +             return 131;
> +     else
> +             return 35;
> +}
> +

Why do we have both a function with hardcoded values and device info
members for this?

BR,
Jani.

>  static void glk_load_degamma_lut(const struct intel_crtc_state *crtc_state)
>  {
>       struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> @@ -827,8 +835,8 @@ static void glk_load_degamma_lut(const struct 
> intel_crtc_state *crtc_state)
>  
>       for (i = 0; i < lut_size; i++) {
>               /*
> -              * First 33 entries represent range from 0 to 1.0
> -              * 34th and 35th entry will represent extended range
> +              * First lut_size entries represent range from 0 to 1.0
> +              * 3 additional lut entries will represent extended range
>                * inputs 3.0 and 7.0 respectively, currently clamped
>                * at 1.0. Since the precision is 16bit, the user
>                * value can be directly filled to register.
> @@ -844,7 +852,7 @@ static void glk_load_degamma_lut(const struct 
> intel_crtc_state *crtc_state)
>       }
>  
>       /* Clamp values > 1.0. */
> -     while (i++ < 35)
> +     while (i++ < glk_degamma_lut_size(dev_priv))
>               intel_de_write_fw(dev_priv, PRE_CSC_GAMC_DATA(pipe), 1 << 16);
>  
>       intel_de_write_fw(dev_priv, PRE_CSC_GAMC_INDEX(pipe), 0);

-- 
Jani Nikula, Intel Open Source Graphics Center

Reply via email to