VBT has a lot of mappings to save bits. Prefer translating them to the
actual values while parsing the VBT, keeping the mappings internal to
intel_bios.c. Use an int with the correct number of lines to wait
instead of keeping the VBT mapping around.

Cc: José Roberto de Souza <[email protected]>
Cc: Jouni Högander <[email protected]>
Cc: Ville Syrjälä <[email protected]>
Signed-off-by: Jani Nikula <[email protected]>

---

Actually lines_to_wait isn't used at all. Should we nuke it altogether
or start using it for something?
---
 drivers/gpu/drm/i915/display/intel_bios.c | 8 ++++----
 drivers/gpu/drm/i915/i915_drv.h           | 9 +--------
 2 files changed, 5 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_bios.c 
b/drivers/gpu/drm/i915/display/intel_bios.c
index c7a8d517ce81..8d105f44892e 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -907,16 +907,16 @@ parse_psr(struct drm_i915_private *i915, const struct 
bdb_header *bdb)
 
        switch (psr_table->lines_to_wait) {
        case 0:
-               i915->vbt.psr.lines_to_wait = PSR_0_LINES_TO_WAIT;
+               i915->vbt.psr.lines_to_wait = 0;
                break;
        case 1:
-               i915->vbt.psr.lines_to_wait = PSR_1_LINE_TO_WAIT;
+               i915->vbt.psr.lines_to_wait = 1;
                break;
        case 2:
-               i915->vbt.psr.lines_to_wait = PSR_4_LINES_TO_WAIT;
+               i915->vbt.psr.lines_to_wait = 4;
                break;
        case 3:
-               i915->vbt.psr.lines_to_wait = PSR_8_LINES_TO_WAIT;
+               i915->vbt.psr.lines_to_wait = 8;
                break;
        default:
                drm_dbg_kms(&i915->drm,
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index beeb42a14aae..4d5b239049bb 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -515,13 +515,6 @@ i915_fence_timeout(const struct drm_i915_private *i915)
 /* Amount of PSF GV points, BSpec precisely defines this */
 #define I915_NUM_PSF_GV_POINTS 3
 
-enum psr_lines_to_wait {
-       PSR_0_LINES_TO_WAIT = 0,
-       PSR_1_LINE_TO_WAIT,
-       PSR_4_LINES_TO_WAIT,
-       PSR_8_LINES_TO_WAIT
-};
-
 struct intel_vbt_data {
        /* bdb version */
        u16 version;
@@ -561,7 +554,7 @@ struct intel_vbt_data {
                bool full_link;
                bool require_aux_wakeup;
                int idle_frames;
-               enum psr_lines_to_wait lines_to_wait;
+               int lines_to_wait;
                int tp1_wakeup_time_us;
                int tp2_tp3_wakeup_time_us;
                int psr2_tp2_tp3_wakeup_time_us;
-- 
2.30.2

Reply via email to