On Tue, 03 May 2022, Ville Syrjala <[email protected]> wrote:
> From: Ville Syrjälä <[email protected]>
>
> Deduplicate the drm_rect comparisons.
>
> Signed-off-by: Ville Syrjälä <[email protected]>
> ---
>  drivers/gpu/drm/i915/display/intel_display.c | 20 ++++++++++----------
>  1 file changed, 10 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
> b/drivers/gpu/drm/i915/display/intel_display.c
> index e38d93beafdd..1093665122a4 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -6088,6 +6088,13 @@ intel_pipe_config_compare(const struct 
> intel_crtc_state *current_config,
>       PIPE_CONF_CHECK_I(name.crtc_vsync_end); \
>  } while (0)
>  
> +#define PIPE_CONF_CHECK_RECT(name) do { \
> +     PIPE_CONF_CHECK_I(name.x1); \
> +     PIPE_CONF_CHECK_I(name.x2); \
> +     PIPE_CONF_CHECK_I(name.y1); \
> +     PIPE_CONF_CHECK_I(name.y2); \
> +} while (0)
> +
>  /* This is required for BDW+ where there is only one set of registers for
>   * switching between high and low RR.
>   * This macro can be used whenever a comparison has to be made between one
> @@ -6250,18 +6257,10 @@ intel_pipe_config_compare(const struct 
> intel_crtc_state *current_config,
>       PIPE_CONF_CHECK_BOOL(pch_pfit.force_thru);
>  
>       if (!fastset) {
> -             PIPE_CONF_CHECK_I(pipe_src.x1);
> -             PIPE_CONF_CHECK_I(pipe_src.y1);
> -             PIPE_CONF_CHECK_I(pipe_src.x2);
> -             PIPE_CONF_CHECK_I(pipe_src.y2);
> +             PIPE_CONF_CHECK_RECT(pipe_src);
>  
>               PIPE_CONF_CHECK_BOOL(pch_pfit.enabled);
> -             if (current_config->pch_pfit.enabled) {

Dropping the if is not what it says on the box. I guess it should be
fine though since we only populate the values if pfit is enabled
AFAICT. (Maybe this is what we should do in general to ensure we're not
reading stuff to state when some feature isn't enabled?)

With the commit message amended,

Reviewed-by: Jani Nikula <[email protected]>


> -                     PIPE_CONF_CHECK_I(pch_pfit.dst.x1);
> -                     PIPE_CONF_CHECK_I(pch_pfit.dst.y1);
> -                     PIPE_CONF_CHECK_I(pch_pfit.dst.x2);
> -                     PIPE_CONF_CHECK_I(pch_pfit.dst.y2);
> -             }
> +             PIPE_CONF_CHECK_RECT(pch_pfit.dst);
>  
>               PIPE_CONF_CHECK_I(scaler_state.scaler_id);
>               PIPE_CONF_CHECK_CLOCK_FUZZY(pixel_rate);
> @@ -6383,6 +6382,7 @@ intel_pipe_config_compare(const struct intel_crtc_state 
> *current_config,
>  #undef PIPE_CONF_CHECK_CLOCK_FUZZY
>  #undef PIPE_CONF_CHECK_COLOR_LUT
>  #undef PIPE_CONF_CHECK_TIMINGS
> +#undef PIPE_CONF_CHECK_RECT
>  #undef PIPE_CONF_QUIRK
>  
>       return ret;

-- 
Jani Nikula, Intel Open Source Graphics Center

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