On Wed, Jul 27, 2022 at 06:34:08PM -0700, Radhakrishna Sripada wrote:
> From: Imre Deak <[email protected]>
>
> On MTL TypeC ports the AUX_CH_CTL and AUX_CH_DATA addresses have
> changed wrt. previous platforms, adjust the code accordingly.
>
> Signed-off-by: Imre Deak <[email protected]>
> ---
> drivers/gpu/drm/i915/display/intel_dp_aux.c | 45 ++++++++++++++++++++-
> 1 file changed, 44 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux.c
> b/drivers/gpu/drm/i915/display/intel_dp_aux.c
> index 40c4bdd9cb26..10616e18dc18 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_aux.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_aux.c
> @@ -637,6 +637,46 @@ static i915_reg_t tgl_aux_data_reg(struct intel_dp
> *intel_dp, int index)
> }
> }
>
> +static i915_reg_t xelpdp_aux_ctl_reg(struct intel_dp *intel_dp)
> +{
> + struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> + struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> + enum aux_ch aux_ch = dig_port->aux_ch;
> +
> + switch (aux_ch) {
> + case AUX_CH_A:
> + case AUX_CH_B:
> + case AUX_CH_USBC1:
> + case AUX_CH_USBC2:
> + case AUX_CH_USBC3:
> + case AUX_CH_USBC4:
> + return XELPDP_DP_AUX_CH_CTL(aux_ch);
> + default:
> + MISSING_CASE(aux_ch);
> + return XELPDP_DP_AUX_CH_CTL(AUX_CH_A);
> + }
> +}
> +
> +static i915_reg_t xelpdp_aux_data_reg(struct intel_dp *intel_dp, int index)
> +{
> + struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> + struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> + enum aux_ch aux_ch = dig_port->aux_ch;
> +
> + switch (aux_ch) {
> + case AUX_CH_A:
> + case AUX_CH_B:
> + case AUX_CH_USBC1:
> + case AUX_CH_USBC2:
> + case AUX_CH_USBC3:
> + case AUX_CH_USBC4:
> + return XELPDP_DP_AUX_CH_DATA(aux_ch, index);
The definition of XELPDP_DP_AUX_CH_DATA was in the previous patch but
wasn't actually used there; it should probably be moved to this one.
Matt
> + default:
> + MISSING_CASE(aux_ch);
> + return XELPDP_DP_AUX_CH_DATA(AUX_CH_A, index);
> + }
> +}
> +
> void intel_dp_aux_fini(struct intel_dp *intel_dp)
> {
> if (cpu_latency_qos_request_active(&intel_dp->pm_qos))
> @@ -652,7 +692,10 @@ void intel_dp_aux_init(struct intel_dp *intel_dp)
> struct intel_encoder *encoder = &dig_port->base;
> enum aux_ch aux_ch = dig_port->aux_ch;
>
> - if (DISPLAY_VER(dev_priv) >= 12) {
> + if (DISPLAY_VER(dev_priv) >= 14) {
> + intel_dp->aux_ch_ctl_reg = xelpdp_aux_ctl_reg;
> + intel_dp->aux_ch_data_reg = xelpdp_aux_data_reg;
> + } else if (DISPLAY_VER(dev_priv) >= 12) {
> intel_dp->aux_ch_ctl_reg = tgl_aux_ctl_reg;
> intel_dp->aux_ch_data_reg = tgl_aux_data_reg;
> } else if (DISPLAY_VER(dev_priv) >= 9) {
> --
> 2.25.1
>
--
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
