On Thu, Jun 01, 2023 at 11:22:18AM -0700, Dixit, Ashutosh wrote:
On Wed, 31 May 2023 14:35:47 -0700, Matt Atwood wrote:
Hi Matt,
Set I915_PMU_MAX_GTS to value in I915_MAX_GT, theres no reason for these
values to be different.
Cc: Tvrtko Ursulin <tvrtko.ursu...@intel.com>
Cc: Umesh Nerlige Ramappa <umesh.nerlige.rama...@intel.com>
Cc: Ashutosh Dixit <ashutosh.di...@intel.com>
I don't believe the mailer actually Cc'd us. I just saw this and am Cc'ing
the people who authored/reviewed the previous series now.
Signed-off-by: Matt Atwood <matthew.s.atw...@intel.com>
---
drivers/gpu/drm/i915/i915_pmu.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_pmu.h b/drivers/gpu/drm/i915/i915_pmu.h
index 33d80fbaab8b..aa929d8c224a 100644
--- a/drivers/gpu/drm/i915/i915_pmu.h
+++ b/drivers/gpu/drm/i915/i915_pmu.h
@@ -38,7 +38,7 @@ enum {
__I915_NUM_PMU_SAMPLERS
};
-#define I915_PMU_MAX_GTS 2
+#define I915_PMU_MAX_GTS 4
This was a discussed during the previous review and it was decided to keep
the two values (I915_PMU_MAX_GTS and I915_MAX_GT) different. There are
currently no platforms and there will be no i915 supported platforms with
MAX_GT 4. So I prefer to leave the values as they currently are. Unless
Umesh or Tvrtko agrees to this patch.
I would leave it as 2 since we specifically changed it to 2 (was 4
earlier) during review of the PMU multi tile support patches.
Thanks,
Umesh
Thanks.
--
Ashutosh
/*
* How many different events we track in the global PMU mask.
--
2.40.0
