Hi Nirmoy,
[...]
> + /* mark the bind context's availability status */
> + bool bind_context_ready;
Do we need some locking here?
> /**
> * pinned_contexts_list: List of pinned contexts. This list is only
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c
> b/drivers/gpu/drm/i915/gt/intel_gt.c
> index 449f0b7fc843..cd0ff1597db9 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gt.c
> @@ -1019,3 +1019,21 @@ enum i915_map_type intel_gt_coherent_map_type(struct
> intel_gt *gt,
> else
> return I915_MAP_WC;
> }
> +
> +void intel_gt_bind_context_set_ready(struct intel_gt *gt, bool ready)
> +{
> + struct intel_engine_cs *engine = gt->engine[BCS0];
> +
> + if (engine && engine->bind_context)
> + engine->bind_context_ready = ready;
> +}
> +
> +bool intel_gt_is_bind_context_ready(struct intel_gt *gt)
> +{
> + struct intel_engine_cs *engine = gt->engine[BCS0];
> +
> + if (engine)
> + return engine->bind_context_ready;
> +
> + return false;
> +}
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt.h
> b/drivers/gpu/drm/i915/gt/intel_gt.h
> index 239848bcb2a4..9e70e625cebc 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt.h
> +++ b/drivers/gpu/drm/i915/gt/intel_gt.h
> @@ -180,4 +180,6 @@ enum i915_map_type intel_gt_coherent_map_type(struct
> intel_gt *gt,
> struct drm_i915_gem_object *obj,
> bool always_coherent);
>
> +void intel_gt_bind_context_set_ready(struct intel_gt *gt, bool ready);
> +bool intel_gt_is_bind_context_ready(struct intel_gt *gt);
Can you put all this part in patch 4 or make it a separate patch?
Andi
