Since now on update is also been called out of set_base let's use a mutex to protec psr state changes.
Signed-off-by: Rodrigo Vivi <[email protected]> --- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/i915_suspend.c | 4 ++++ drivers/gpu/drm/i915/intel_dp.c | 17 ++++++++++++++--- 3 files changed, 19 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 7c53d4d..21470be 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -747,6 +747,7 @@ struct i915_psr { bool sink_support; bool source_ok; bool setup_done; + struct mutex lock; }; enum intel_pch { diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c index 56785e8..ffcba21 100644 --- a/drivers/gpu/drm/i915/i915_suspend.c +++ b/drivers/gpu/drm/i915/i915_suspend.c @@ -288,6 +288,10 @@ static void i915_restore_display(struct drm_device *dev) I915_WRITE(PP_CONTROL, dev_priv->regfile.savePP_CONTROL); } + /* Force a full PSR setup on resume */ + dev_priv->psr.setup_done = false; + intel_edp_psr_update(dev); + /* only restore FBC info on the platform that supports FBC*/ intel_disable_fbc(dev); diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 30d4350..80054bb 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -1633,6 +1633,8 @@ static void intel_edp_psr_setup(struct intel_dp *intel_dp) if (dev_priv->psr.setup_done) return; + mutex_init(&dev_priv->psr.lock); + /* Prepare VSC packet as per EDP 1.3 spec, Table 3.10 */ memset(&psr_vsc, 0, sizeof(psr_vsc)); psr_vsc.sdp_header.HB0 = 0; @@ -1777,9 +1779,6 @@ static void intel_edp_psr_do_enable(struct intel_dp *intel_dp) intel_edp_is_psr_enabled(dev)) return; - /* Setup PSR once */ - intel_edp_psr_setup(intel_dp); - /* Enable PSR on the panel */ intel_edp_psr_enable_sink(intel_dp); @@ -1790,10 +1789,16 @@ static void intel_edp_psr_do_enable(struct intel_dp *intel_dp) void intel_edp_psr_enable(struct intel_dp *intel_dp) { struct drm_device *dev = intel_dp_to_dev(intel_dp); + struct drm_i915_private *dev_priv = dev->dev_private; + /* Setup PSR once */ + intel_edp_psr_setup(intel_dp); + + mutex_lock(&dev_priv->psr.lock); if (intel_edp_psr_match_conditions(intel_dp) && !intel_edp_is_psr_enabled(dev)) intel_edp_psr_do_enable(intel_dp); + mutex_unlock(&dev_priv->psr.lock); } void intel_edp_psr_disable(struct intel_dp *intel_dp) @@ -1815,9 +1820,13 @@ void intel_edp_psr_disable(struct intel_dp *intel_dp) void intel_edp_psr_update(struct drm_device *dev) { + struct drm_i915_private *dev_priv = dev->dev_private; struct intel_encoder *encoder; struct intel_dp *intel_dp = NULL; + if (!dev_priv->psr.setup_done) + return; + list_for_each_entry(encoder, &dev->mode_config.encoder_list, base.head) if (encoder->type == INTEL_OUTPUT_EDP) { intel_dp = enc_to_intel_dp(&encoder->base); @@ -1825,11 +1834,13 @@ void intel_edp_psr_update(struct drm_device *dev) if (!is_edp_psr(dev)) return; + mutex_lock(&dev_priv->psr.lock); if (!intel_edp_psr_match_conditions(intel_dp)) intel_edp_psr_disable(intel_dp); else if (!intel_edp_is_psr_enabled(dev)) intel_edp_psr_do_enable(intel_dp); + mutex_unlock(&dev_priv->psr.lock); } } -- 1.8.1.2 _______________________________________________ Intel-gfx mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/intel-gfx
