On Tue, 2023-11-14 at 10:20 +0000, Hogander, Jouni wrote:
> On Mon, 2023-11-13 at 22:32 +0200, Juha-Pekka Heikkila wrote:
> > Here created intel_dpt_common.c to hold intel_dpt_configure which
> > is
> > needed for both xe and i915.
>
> For the whole series:
>
> Reviewed-by: Jouni Högander <jouni.hogan...@intel.com>
Thank you Juha-Pekka for the patches. These are now pushed to drm-
intel-next.
BR,
Jouni Högander
>
> BR,
>
> Jouni Högander
>
>
> > Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikk...@gmail.com>
> > ---
> > drivers/gpu/drm/i915/Makefile | 1 +
> > drivers/gpu/drm/i915/display/intel_display.c | 1 +
> > drivers/gpu/drm/i915/display/intel_dpt.c | 26 --------------
> > drivers/gpu/drm/i915/display/intel_dpt.h | 2 --
> > .../gpu/drm/i915/display/intel_dpt_common.c | 34
> > +++++++++++++++++++
> > .../gpu/drm/i915/display/intel_dpt_common.h | 13 +++++++
> > 6 files changed, 49 insertions(+), 28 deletions(-)
> > create mode 100644 drivers/gpu/drm/i915/display/intel_dpt_common.c
> > create mode 100644 drivers/gpu/drm/i915/display/intel_dpt_common.h
> >
> > diff --git a/drivers/gpu/drm/i915/Makefile
> > b/drivers/gpu/drm/i915/Makefile
> > index 239da40a401f..c18a20c47265 100644
> > --- a/drivers/gpu/drm/i915/Makefile
> > +++ b/drivers/gpu/drm/i915/Makefile
> > @@ -275,6 +275,7 @@ i915-y += \
> > display/intel_dpll.o \
> > display/intel_dpll_mgr.o \
> > display/intel_dpt.o \
> > + display/intel_dpt_common.o \
> > display/intel_drrs.o \
> > display/intel_dsb.o \
> > display/intel_fb.o \
> > diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> > b/drivers/gpu/drm/i915/display/intel_display.c
> > index 3effafcbb411..12c163203658 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > @@ -77,6 +77,7 @@
> > #include "intel_dpll.h"
> > #include "intel_dpll_mgr.h"
> > #include "intel_dpt.h"
> > +#include "intel_dpt_common.h"
> > #include "intel_drrs.h"
> > #include "intel_dsb.h"
> > #include "intel_dsi.h"
> > diff --git a/drivers/gpu/drm/i915/display/intel_dpt.c
> > b/drivers/gpu/drm/i915/display/intel_dpt.c
> > index 2b067cb952f0..b29bceff73f2 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dpt.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dpt.c
> > @@ -9,8 +9,6 @@
> > #include "gt/gen8_ppgtt.h"
> >
> > #include "i915_drv.h"
> > -#include "i915_reg.h"
> > -#include "intel_de.h"
> > #include "intel_display_types.h"
> > #include "intel_dpt.h"
> > #include "intel_fb.h"
> > @@ -318,27 +316,3 @@ void intel_dpt_destroy(struct
> > i915_address_space
> > *vm)
> > i915_vm_put(&dpt->vm);
> > }
> >
> > -void intel_dpt_configure(struct intel_crtc *crtc)
> > -{
> > - struct drm_i915_private *i915 = to_i915(crtc->base.dev);
> > -
> > - if (DISPLAY_VER(i915) == 14) {
> > - enum pipe pipe = crtc->pipe;
> > - enum plane_id plane_id;
> > -
> > - for_each_plane_id_on_crtc(crtc, plane_id) {
> > - if (plane_id == PLANE_CURSOR)
> > - continue;
> > -
> > - intel_de_rmw(i915, PLANE_CHICKEN(pipe,
> > plane_id),
> > - PLANE_CHICKEN_DISABLE_DPT,
> > - i915-
> > >display.params.enable_dpt
> > ? 0 :
> > - PLANE_CHICKEN_DISABLE_DPT);
> > - }
> > - } else if (DISPLAY_VER(i915) == 13) {
> > - intel_de_rmw(i915, CHICKEN_MISC_2,
> > - CHICKEN_MISC_DISABLE_DPT,
> > - i915->display.params.enable_dpt ? 0 :
> > - CHICKEN_MISC_DISABLE_DPT);
> > - }
> > -}
> > diff --git a/drivers/gpu/drm/i915/display/intel_dpt.h
> > b/drivers/gpu/drm/i915/display/intel_dpt.h
> > index d9a166550185..e18a9f767b11 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dpt.h
> > +++ b/drivers/gpu/drm/i915/display/intel_dpt.h
> > @@ -10,7 +10,6 @@ struct drm_i915_private;
> >
> > struct i915_address_space;
> > struct i915_vma;
> > -struct intel_crtc;
> > struct intel_framebuffer;
> >
> > void intel_dpt_destroy(struct i915_address_space *vm);
> > @@ -20,6 +19,5 @@ void intel_dpt_suspend(struct drm_i915_private
> > *i915);
> > void intel_dpt_resume(struct drm_i915_private *i915);
> > struct i915_address_space *
> > intel_dpt_create(struct intel_framebuffer *fb);
> > -void intel_dpt_configure(struct intel_crtc *crtc);
> >
> > #endif /* __INTEL_DPT_H__ */
> > diff --git a/drivers/gpu/drm/i915/display/intel_dpt_common.c
> > b/drivers/gpu/drm/i915/display/intel_dpt_common.c
> > new file mode 100644
> > index 000000000000..cdba47165c04
> > --- /dev/null
> > +++ b/drivers/gpu/drm/i915/display/intel_dpt_common.c
> > @@ -0,0 +1,34 @@
> > +// SPDX-License-Identifier: MIT
> > +/*
> > + * Copyright © 2023 Intel Corporation
> > + */
> > +
> > +#include "i915_reg.h"
> > +#include "intel_de.h"
> > +#include "intel_display_types.h"
> > +#include "intel_dpt_common.h"
> > +
> > +void intel_dpt_configure(struct intel_crtc *crtc)
> > +{
> > + struct drm_i915_private *i915 = to_i915(crtc->base.dev);
> > +
> > + if (DISPLAY_VER(i915) == 14) {
> > + enum pipe pipe = crtc->pipe;
> > + enum plane_id plane_id;
> > +
> > + for_each_plane_id_on_crtc(crtc, plane_id) {
> > + if (plane_id == PLANE_CURSOR)
> > + continue;
> > +
> > + intel_de_rmw(i915, PLANE_CHICKEN(pipe,
> > plane_id),
> > + PLANE_CHICKEN_DISABLE_DPT,
> > + i915-
> > >display.params.enable_dpt
> > ? 0 :
> > + PLANE_CHICKEN_DISABLE_DPT);
> > + }
> > + } else if (DISPLAY_VER(i915) == 13) {
> > + intel_de_rmw(i915, CHICKEN_MISC_2,
> > + CHICKEN_MISC_DISABLE_DPT,
> > + i915->display.params.enable_dpt ? 0 :
> > + CHICKEN_MISC_DISABLE_DPT);
> > + }
> > +}
> > diff --git a/drivers/gpu/drm/i915/display/intel_dpt_common.h
> > b/drivers/gpu/drm/i915/display/intel_dpt_common.h
> > new file mode 100644
> > index 000000000000..6d7de405126a
> > --- /dev/null
> > +++ b/drivers/gpu/drm/i915/display/intel_dpt_common.h
> > @@ -0,0 +1,13 @@
> > +/* SPDX-License-Identifier: MIT */
> > +/*
> > + * Copyright © 2023 Intel Corporation
> > + */
> > +
> > +#ifndef __INTEL_DPT_COMMON_H__
> > +#define __INTEL_DPT_COMMON_H__
> > +
> > +struct intel_crtc;
> > +
> > +void intel_dpt_configure(struct intel_crtc *crtc);
> > +
> > +#endif /* __INTEL_DPT_COMMON_H__ */
>
