Re: [PATCH 2/6] drm/i915/adlp: Add MST short HBlank WA (Wa_14014143976)

[Nautiyal, Ankit K]

On 1/29/2024 11:25 PM, Imre Deak wrote:

Add a workaround to fix BS jitter issues on MST links if the HBLANK
period is less than 1 MTP. The WA applies only to UHBR rates while on
non-UHBR the specification requires disabling it explicitly - presumedly
because the register's reset value has the WA enabled.

Bspec: 50050, 55424

Signed-off-by: Imre Deak <imre.d...@intel.com>

LGTM.


Reviewed-by: Ankit Nautiyal <ankit.k.nauti...@intel.com>

---
  drivers/gpu/drm/i915/display/intel_dp_mst.c | 8 ++++++++
  drivers/gpu/drm/i915/i915_reg.h             | 1 +
  2 files changed, 9 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c 
b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index 22c1759f912db..23f3f7fab9d0b 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -1122,6 +1122,14 @@ static void enable_bs_jitter_was(const struct 
intel_crtc_state *crtc_state)
        if (crtc_state->fec_enable || intel_dp_is_uhbr(crtc_state))
                set |= DP_MST_FEC_BS_JITTER_WA(crtc_state->cpu_transcoder);

+ /* Wa_14014143976:adlp */

+       if (IS_DISPLAY_STEP(i915, STEP_E0, STEP_FOREVER)) {
+               if (intel_dp_is_uhbr(crtc_state))
+                       set |= 
DP_MST_SHORT_HBLANK_WA(crtc_state->cpu_transcoder);
+               else if (crtc_state->fec_enable)
+                       clear |= 
DP_MST_SHORT_HBLANK_WA(crtc_state->cpu_transcoder);
+       }
+
        if (!clear && !set)
                return;

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h

index 67b7d02ea37bf..091edc1071e0e 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -4556,6 +4556,7 @@
  #define   GLK_CL0_PWR_DOWN            REG_BIT(10)

#define CHICKEN_MISC_3 _MMIO(0x42088)

+#define   DP_MST_SHORT_HBLANK_WA(trans)                REG_BIT(5 + (trans) - 
TRANSCODER_A)
  #define   DP_MST_FEC_BS_JITTER_WA(trans)      REG_BIT(0 + (trans) - 
TRANSCODER_A)

#define CHICKEN_MISC_4 _MMIO(0x4208c)