The DSC DPT bpp limit check should only fail if the available DPT BW is
less than the required BW, fix the check accordingly.
Signed-off-by: Imre Deak <imre.d...@intel.com>
---
drivers/gpu/drm/i915/display/intel_dp_mst.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c
b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index b2bcf66071b05..c21fd7a2cd44f 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -60,7 +60,7 @@ static int intel_dp_mst_check_constraints(struct
drm_i915_private *i915, int bpp
int output_bpp = bpp;
int symbol_clock =
intel_dp_link_symbol_clock(crtc_state->port_clock);
- if (output_bpp * adjusted_mode->crtc_clock >=
+ if (output_bpp * adjusted_mode->crtc_clock >
symbol_clock * 72) {
drm_dbg_kms(&i915->drm, "UHBR check failed(required bw
%d available %d)\n",
output_bpp * adjusted_mode->crtc_clock,
symbol_clock * 72);
--
2.43.3
