On Thu, 16 May 2024, Ville Syrjala <[email protected]> wrote: > From: Ville Syrjälä <[email protected]> > > PIPEGCMAX was left behind when all other gamma registers moved > into intel_color_regs.h. > > Signed-off-by: Ville Syrjälä <[email protected]>
Reviewed-by: Jani Nikula <[email protected]> > --- > drivers/gpu/drm/i915/display/intel_color_regs.h | 5 +++++ > drivers/gpu/drm/i915/i915_reg.h | 4 ---- > 2 files changed, 5 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_color_regs.h > b/drivers/gpu/drm/i915/display/intel_color_regs.h > index bb99ea533842..61c18b4a7fa5 100644 > --- a/drivers/gpu/drm/i915/display/intel_color_regs.h > +++ b/drivers/gpu/drm/i915/display/intel_color_regs.h > @@ -36,6 +36,11 @@ > _CHV_PALETTE_C, > _CHV_PALETTE_C) + \ > (i) * 4) > > +/* i965/g4x/vlv/chv */ > +#define _PIPEAGCMAX 0x70010 > +#define _PIPEBGCMAX 0x71010 > +#define PIPEGCMAX(pipe, i) _MMIO_PIPE2(dev_priv, pipe, _PIPEAGCMAX + (i) > * 4) /* u1.16 */ > + > /* ilk+ palette */ > #define _LGC_PALETTE_A 0x4a000 > #define _LGC_PALETTE_B 0x4a800 > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > index 52b029cd3981..f5e8833cc37e 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -1882,10 +1882,6 @@ > #define PIPEFRAMEPIXEL(pipe) _MMIO_PIPE2(dev_priv, pipe, _PIPEAFRAMEPIXEL) > #define PIPESTAT(pipe) _MMIO_PIPE2(dev_priv, pipe, _PIPEASTAT) > > -#define _PIPEAGCMAX 0x70010 > -#define _PIPEBGCMAX 0x71010 > -#define PIPEGCMAX(pipe, i) _MMIO_PIPE2(dev_priv, pipe, _PIPEAGCMAX + (i) > * 4) /* u1.16 */ > - > #define _PIPE_ARB_CTL_A 0x70028 /* icl+ */ > #define PIPE_ARB_CTL(pipe) _MMIO_PIPE2(dev_priv, pipe, > _PIPE_ARB_CTL_A) > #define PIPE_ARB_USE_PROG_SLOTS REG_BIT(13) -- Jani Nikula, Intel
