> -----Original Message----- > From: Intel-gfx <[email protected]> On Behalf Of Ankit > Nautiyal > Sent: Wednesday, December 13, 2023 2:46 PM > To: [email protected] > Cc: Nikula, Jani <[email protected]> > Subject: [PATCH 1/5] drm/i915/dp: Simplify checks for helper > intel_dp_dsc_max_src_input_bpc > > In helper intel_dp_dsc_max_src_input_bpc it is assumed that platforms > earlier to ICL do not support DSC, and the function returns 0 for those > platforms. > > Use HAS_DSC macro instead and return 0 for platforms that do not support > DSC. > > v2: Updated commit message with clarification. (Jani) > > Signed-off-by: Ankit Nautiyal <[email protected]> LGTM, Reviewed-by: Suraj Kandpal <[email protected]> > --- > drivers/gpu/drm/i915/display/intel_dp.c | 7 ++++--- > 1 file changed, 4 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c > b/drivers/gpu/drm/i915/display/intel_dp.c > index 3b2482bf683f..a8015f701626 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp.c > +++ b/drivers/gpu/drm/i915/display/intel_dp.c > @@ -1629,13 +1629,14 @@ intel_dp_compute_link_config_wide(struct > intel_dp *intel_dp, static > u8 intel_dp_dsc_max_src_input_bpc(struct drm_i915_private *i915) { > + if (!HAS_DSC(i915)) > + return 0; > + > /* Max DSC Input BPC for ICL is 10 and for TGL+ is 12 */ > - if (DISPLAY_VER(i915) >= 12) > - return 12; > if (DISPLAY_VER(i915) == 11) > return 10; > > - return 0; > + return 12; > } > > int intel_dp_dsc_compute_max_bpp(const struct intel_connector > *connector, > -- > 2.40.1
