> -----Original Message-----
> From: Nautiyal, Ankit K <[email protected]>
> Sent: Wednesday, November 20, 2024 4:08 PM
> To: [email protected]
> Cc: [email protected]; Kandpal, Suraj <[email protected]>;
> [email protected]; Deak, Imre <[email protected]>
> Subject: [PATCH 09/12] drm/i915/dp_mst: Refactor pipe_bpp limits with dsc
> for mst
>
> Similar to DP, set the dsc limits->pipe.max/min_bpp early for MST too.
> Use the limits while computing the compressed bpp.
>
LGTM,
Reviewed-by: Suraj Kandpal <[email protected]>
> Signed-off-by: Ankit Nautiyal <[email protected]>
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 2 +-
> drivers/gpu/drm/i915/display/intel_dp.h | 3 +++
> drivers/gpu/drm/i915/display/intel_dp_mst.c | 11 +++++------
> 3 files changed, 9 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index b6d5e8eb75f5..827368b6cdb9 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -2512,7 +2512,7 @@ intel_dp_compute_config_link_bpp_limits(struct
> intel_dp *intel_dp,
> return true;
> }
>
> -static void
> +void
> intel_dp_dsc_compute_pipe_bpp_limits(struct intel_dp *intel_dp,
> struct link_config_limits *limits) { diff
> --git
> a/drivers/gpu/drm/i915/display/intel_dp.h
> b/drivers/gpu/drm/i915/display/intel_dp.h
> index e5a25e5cbc25..973b2aa0da1d 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.h
> +++ b/drivers/gpu/drm/i915/display/intel_dp.h
> @@ -200,6 +200,9 @@ intel_dp_compute_config_link_bpp_limits(struct
> intel_dp *intel_dp,
> const struct intel_crtc_state
> *crtc_state,
> bool dsc,
> struct link_config_limits *limits);
> +void
> +intel_dp_dsc_compute_pipe_bpp_limits(struct intel_dp *intel_dp,
> + struct link_config_limits *limits);
>
> void intel_dp_get_dsc_sink_cap(u8 dpcd_rev, struct intel_connector
> *connector); bool intel_dp_has_gamut_metadata_dip(struct intel_encoder
> *encoder); diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index 9568924d143b..78cb65f7cb2b 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -366,14 +366,10 @@ static int
> mst_stream_dsc_compute_link_config(struct intel_encoder *encoder,
> int i, num_bpc;
> u8 dsc_bpc[3] = {};
> int min_bpp, max_bpp, sink_min_bpp, sink_max_bpp;
> - int dsc_max_bpc, dsc_min_bpc;
> int min_compressed_bpp, max_compressed_bpp;
>
> - dsc_max_bpc = intel_dp_dsc_max_src_input_bpc(display);
> - dsc_min_bpc = intel_dp_dsc_min_src_input_bpc(display);
> -
> - max_bpp = min(dsc_max_bpc * 3, limits->pipe.max_bpp);
> - min_bpp = max(dsc_min_bpc * 3, limits->pipe.min_bpp);
> + max_bpp = limits->pipe.max_bpp;
> + min_bpp = limits->pipe.min_bpp;
>
> num_bpc = drm_dp_dsc_sink_supported_input_bpcs(connector-
> >dp.dsc_dpcd,
> dsc_bpc);
> @@ -576,6 +572,9 @@ mst_stream_compute_config_limits(struct intel_dp
> *intel_dp,
>
> intel_dp_test_compute_config(intel_dp, crtc_state, limits);
>
> + if (dsc)
> + intel_dp_dsc_compute_pipe_bpp_limits(intel_dp, limits);
> +
> if (!intel_dp_compute_config_link_bpp_limits(intel_dp,
> crtc_state,
> dsc,
> --
> 2.45.2
