On Tue, Mar 25, 2014 at 03:23:34PM +0530, sourab.gu...@intel.com wrote: > From: Akash Goel <akash.g...@intel.com> > > Added a new rendering specific Workaround 'WaTlbInvalidateStoreDataBefore'. > This workaround has to be applied before doing TLB Invalidation on render > ring. > In this WA, before pipecontrol with TLB invalidate set, need to add 2 MI > Store data commands. > Without this, hardware cannot guarantee the command after the PIPE_CONTROL > with TLB inv will not use the old TLB values.
Note, that our command programming sequence already has multiple dword writes between the flush of the last batch and the invalidation of the next. Is this w/a still required? Why? -Chris -- Chris Wilson, Intel Open Source Technology Centre _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
