[PATCH v5 08/17] drm/i915/vrr: Add compute config for DC Balance params

[Mitul Golani]

Compute DC Balance parameters and tunable params based on
experiments.

--v2:
- Document tunable params. (Ankit)

--v3:
- Add line spaces to compute config. (Ankit)
- Remove redundancy checks.

Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.gol...@intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nauti...@intel.com>
---
 drivers/gpu/drm/i915/display/intel_vrr.c | 25 ++++++++++++++++++++++++
 1 file changed, 25 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c 
b/drivers/gpu/drm/i915/display/intel_vrr.c
index 726fa49558d1..dcaae7631b0a 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -16,6 +16,13 @@
 
 #define FIXED_POINT_PRECISION          100
 #define CMRR_PRECISION_TOLERANCE       10
+/*
+ * Tunable parameters for DC Balance correction.
+ * These are captured based on experimentations.
+ */
+#define DCB_CORRECTION_SENSITIVITY     30
+#define DCB_CORRECTION_AGGRESSIVENESS  1000
+#define DCB_BLANK_TARGET               50
 
 bool intel_vrr_is_capable(struct intel_connector *connector)
 {
@@ -409,6 +416,24 @@ intel_vrr_compute_config(struct intel_crtc_state 
*crtc_state,
                        (crtc_state->hw.adjusted_mode.crtc_vtotal -
                         crtc_state->hw.adjusted_mode.vsync_end);
        }
+
+       if (crtc_state->vrr.dc_balance.enable) {
+               crtc_state->vrr.dc_balance.vmax = crtc_state->vrr.vmax;
+               crtc_state->vrr.dc_balance.vmin = crtc_state->vrr.vmin;
+               crtc_state->vrr.dc_balance.max_increase =
+                       crtc_state->vrr.vmax - crtc_state->vrr.vmin;
+               crtc_state->vrr.dc_balance.max_decrease =
+                       crtc_state->vrr.vmax - crtc_state->vrr.vmin;
+               crtc_state->vrr.dc_balance.guardband =
+                       DIV_ROUND_UP(crtc_state->vrr.dc_balance.vmax *
+                                    DCB_CORRECTION_SENSITIVITY, 100);
+               crtc_state->vrr.dc_balance.slope =
+                       DIV_ROUND_UP(DCB_CORRECTION_AGGRESSIVENESS * 10,
+                                    crtc_state->vrr.dc_balance.guardband);
+               crtc_state->vrr.dc_balance.vblank_target =
+                       DIV_ROUND_UP((crtc_state->vrr.vmax - 
crtc_state->vrr.vmin) *
+                                    DCB_BLANK_TARGET, 100);
+       }
 }
 
 void intel_vrr_compute_config_late(struct intel_crtc_state *crtc_state)
-- 
2.48.1