On Thu, Jun 05, 2025 at 01:29:34PM +0300, Jani Nikula wrote:
> In preparation for dropping the dependency on struct intel_uncore from
> display code, add a struct drm_device based interface to pcode.
> 

Reviewed-by: Rodrigo Vivi <rodrigo.v...@intel.com>

> Signed-off-by: Jani Nikula <jani.nik...@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_pcode.c | 24 ++++++++++++++++++++++++
>  drivers/gpu/drm/i915/intel_pcode.h | 10 ++++++++++
>  2 files changed, 34 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_pcode.c 
> b/drivers/gpu/drm/i915/intel_pcode.c
> index b7e9b4ee1425..81da75108c60 100644
> --- a/drivers/gpu/drm/i915/intel_pcode.c
> +++ b/drivers/gpu/drm/i915/intel_pcode.c
> @@ -272,3 +272,27 @@ int snb_pcode_write_p(struct intel_uncore *uncore, u32 
> mbcmd, u32 p1, u32 p2, u3
>  
>       return err;
>  }
> +
> +/* Helpers with drm device */
> +int intel_pcode_read(struct drm_device *drm, u32 mbox, u32 *val, u32 *val1)
> +{
> +     struct drm_i915_private *i915 = to_i915(drm);
> +
> +     return snb_pcode_read(&i915->uncore, mbox, val, val1);
> +}
> +
> +int intel_pcode_write_timeout(struct drm_device *drm, u32 mbox, u32 val, int 
> timeout_ms)
> +{
> +     struct drm_i915_private *i915 = to_i915(drm);
> +
> +     return snb_pcode_write_timeout(&i915->uncore, mbox, val, timeout_ms);
> +}
> +
> +int intel_pcode_request(struct drm_device *drm, u32 mbox, u32 request,
> +                     u32 reply_mask, u32 reply, int timeout_base_ms)
> +{
> +     struct drm_i915_private *i915 = to_i915(drm);
> +
> +     return skl_pcode_request(&i915->uncore, mbox, request, reply_mask, 
> reply,
> +                              timeout_base_ms);
> +}
> diff --git a/drivers/gpu/drm/i915/intel_pcode.h 
> b/drivers/gpu/drm/i915/intel_pcode.h
> index 401ce27f72d4..c91a821a88d4 100644
> --- a/drivers/gpu/drm/i915/intel_pcode.h
> +++ b/drivers/gpu/drm/i915/intel_pcode.h
> @@ -8,6 +8,7 @@
>  
>  #include <linux/types.h>
>  
> +struct drm_device;
>  struct intel_uncore;
>  
>  int snb_pcode_read(struct intel_uncore *uncore, u32 mbox, u32 *val, u32 
> *val1);
> @@ -26,4 +27,13 @@ int intel_pcode_init(struct intel_uncore *uncore);
>  int snb_pcode_read_p(struct intel_uncore *uncore, u32 mbcmd, u32 p1, u32 p2, 
> u32 *val);
>  int snb_pcode_write_p(struct intel_uncore *uncore, u32 mbcmd, u32 p1, u32 
> p2, u32 val);
>  
> +/* Helpers with drm device */
> +int intel_pcode_read(struct drm_device *drm, u32 mbox, u32 *val, u32 *val1);
> +int intel_pcode_write_timeout(struct drm_device *drm, u32 mbox, u32 val, int 
> timeout_ms);
> +#define intel_pcode_write(drm, mbox, val) \
> +     intel_pcode_write_timeout((drm), (mbox), (val), 1)
> +
> +int intel_pcode_request(struct drm_device *drm, u32 mbox, u32 request,
> +                     u32 reply_mask, u32 reply, int timeout_base_ms);
> +
>  #endif /* _INTEL_PCODE_H */
> -- 
> 2.39.5
> 

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