-----Original Message-----
From: Intel-xe <intel-xe-boun...@lists.freedesktop.org> On Behalf Of Uma Shankar
Sent: Tuesday, September 2, 2025 4:36 AM
To: intel-gfx@lists.freedesktop.org; intel...@lists.freedesktop.org
Cc: ville.syrj...@linux.intel.com; Govindapillai, Vinod
<vinod.govindapil...@intel.com>; Shankar, Uma <uma.shan...@intel.com>
Subject: [PATCH 1/1] drm/i915/display: Remove FBC modulo 4 restriction for ADL+
>
> FBC restriction where FBC is disabled for non-modulo 4 plane size
> (including plane size + yoffset) is fixed from ADL onwards in h/w.
> WA:22010751166
>
> Relax the restriction for the same.
>
> v2: Update the macro for display version check (Vinod)
>
> Credits-to: Vidya Srinivas <vidya.srini...@intel.com>
I saw an earlier comment about how Credits-to: is not a trailer we should be
using.
Of the given alternatives, I'd recommend using Suggested-by.
> Reviewed-by: Vinod Govindapillai <vinod.govindapil...@intel.com>
Reviewed-bys should go below Signed-off-bys.
> Signed-off-by: Uma Shankar <uma.shan...@intel.com>
The commit message here is the same as the commit message for the associated
IGT patch, and all my comments there apply here as well. But for the sake
of completeness:
1.
s/ADL/ADL-P
2.
The phrasing here is a bit difficult to parse and sort of implies the
WA is the fix to the FBC restriction for ADL onwards, which is not
the case. Try [for the first paragraph]:
"""
WA:22010751166 does not apply past display version 12. Or, in
other words, the FBC restriction where FBC is disabled for
non-modulo 4 plane sizes (including plane size + yoffset) is fixed
from display version 13 and onwards.
"""
-Jonathan Cavitt
> ---
> drivers/gpu/drm/i915/display/intel_fbc.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c
> b/drivers/gpu/drm/i915/display/intel_fbc.c
> index d4c5deff9cbe..9e097ed80bd1 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> @@ -1550,14 +1550,14 @@ static int intel_fbc_check_plane(struct
> intel_atomic_state *state,
> * having a Y offset that isn't divisible by 4 causes FIFO underrun
> * and screen flicker.
> */
> - if (DISPLAY_VER(display) >= 9 &&
> + if (IS_DISPLAY_VER(display, 9, 12) &&
> plane_state->view.color_plane[0].y & 3) {
> plane_state->no_fbc_reason = "plane start Y offset misaligned";
> return 0;
> }
>
> /* Wa_22010751166: icl, ehl, tgl, dg1, rkl */
> - if (DISPLAY_VER(display) >= 11 &&
> + if (IS_DISPLAY_VER(display, 9, 12) &&
> (plane_state->view.color_plane[0].y +
> (drm_rect_height(&plane_state->uapi.src) >> 16)) & 3) {
> plane_state->no_fbc_reason = "plane end Y offset misaligned";
> --
> 2.42.0
>
>
