On Wed, 05 Nov 2025, Ville Syrjala <[email protected]> wrote: > From: Ville Syrjälä <[email protected]> > > Include the units the in the define name for XELPDP_PORT_RESET_END_TIMEOUT > to make it match all its other counterparts. > > Signed-off-by: Ville Syrjälä <[email protected]>
Reviewed-by: Jani Nikula <[email protected]> > --- > drivers/gpu/drm/i915/display/intel_cx0_phy.c | 4 ++-- > drivers/gpu/drm/i915/display/intel_cx0_phy_regs.h | 2 +- > 2 files changed, 3 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c > b/drivers/gpu/drm/i915/display/intel_cx0_phy.c > index 55ce4f673c63..7c9c181aba8a 100644 > --- a/drivers/gpu/drm/i915/display/intel_cx0_phy.c > +++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.c > @@ -2926,10 +2926,10 @@ static void intel_cx0_phy_lane_reset(struct > intel_encoder *encoder, > > if (intel_de_wait_for_clear(display, XELPDP_PORT_BUF_CTL2(display, > port), > lane_phy_current_status, > - XELPDP_PORT_RESET_END_TIMEOUT)) > + XELPDP_PORT_RESET_END_TIMEOUT_US)) > drm_warn(display->drm, > "PHY %c failed to bring out of Lane reset after > %dms.\n", > - phy_name(phy), XELPDP_PORT_RESET_END_TIMEOUT); > + phy_name(phy), XELPDP_PORT_RESET_END_TIMEOUT_US); > } > > static void intel_cx0_program_phy_lane(struct intel_encoder *encoder, int > lane_count, > diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy_regs.h > b/drivers/gpu/drm/i915/display/intel_cx0_phy_regs.h > index bd62c396c837..77244a5d52d4 100644 > --- a/drivers/gpu/drm/i915/display/intel_cx0_phy_regs.h > +++ b/drivers/gpu/drm/i915/display/intel_cx0_phy_regs.h > @@ -80,7 +80,7 @@ > #define XELPDP_PORT_BUF_SOC_READY_TIMEOUT_US 100 > #define XELPDP_PORT_RESET_START_TIMEOUT_US 5 > #define XELPDP_PORT_POWERDOWN_UPDATE_TIMEOUT_US 100 > -#define XELPDP_PORT_RESET_END_TIMEOUT 15 > +#define XELPDP_PORT_RESET_END_TIMEOUT_US 15 > #define XELPDP_REFCLK_ENABLE_TIMEOUT_US 1 > > #define _XELPDP_PORT_BUF_CTL1_LN0_A 0x64004 -- Jani Nikula, Intel
