> Subject: [PATCH 15/16] drm/i915/power: Use the intel_de_wait_ms() out > value > > Utilize the 'out_value' output parameter of intel_de_wait_ms() isntead of re- > readiong the PHY_CONTROL register after polling has finished.
* instead * re-reading With that fixed Reviewed-by: Suraj Kandpal <[email protected]> > > Signed-off-by: Ville Syrjälä <[email protected]> > --- > drivers/gpu/drm/i915/display/intel_display_power_well.c | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display_power_well.c > b/drivers/gpu/drm/i915/display/intel_display_power_well.c > index 8593d2daeaa6..f4f7e73acc87 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_power_well.c > +++ b/drivers/gpu/drm/i915/display/intel_display_power_well.c > @@ -1358,6 +1358,7 @@ static void assert_chv_phy_status(struct > intel_display *display) > u32 phy_control = display->power.chv_phy_control; > u32 phy_status = 0; > u32 phy_status_mask = 0xffffffff; > + u32 val; > > /* > * The BIOS can leave the PHY is some weird state @@ -1446,11 > +1447,10 @@ static void assert_chv_phy_status(struct intel_display *display) > * so the power state can take a while to actually change. > */ > if (intel_de_wait_ms(display, DISPLAY_PHY_STATUS, > - phy_status_mask, phy_status, 10, NULL)) > + phy_status_mask, phy_status, 10, &val)) > drm_err(display->drm, > "Unexpected PHY_STATUS 0x%08x, expected 0x%08x > (PHY_CONTROL=0x%08x)\n", > - intel_de_read(display, DISPLAY_PHY_STATUS) & > phy_status_mask, > - phy_status, display->power.chv_phy_control); > + val & phy_status_mask, phy_status, display- > >power.chv_phy_control); > } > > #undef BITS_SET > -- > 2.49.1
