> Subject: [PATCH v2 19/32] drm/i915/cx0: Add MTL+ .get_dplls hook > > Add .get_dplls function pointer for MTL+ platforms to support dpll framework. > Reuse the ICL function pointer. > > v2: Getting configuration either for a C10 or on the PTL port B > eDP on TypeC PHY case for a C20 PHY PLL. Hence refer to this > case as "non_tc_phy" instead of "c10phy". > v3: Fix comment to "eDP over TypeC" (Suraj) > Fix pll id as separate variable (Suraj) > > Signed-off-by: Imre Deak <[email protected]> > Signed-off-by: Mika Kahola <[email protected]>
LGTM, Reviewed-by: Suraj Kandpal <[email protected]> > --- > drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 57 +++++++++++++++++++ > drivers/gpu/drm/i915/display/intel_dpll_mgr.h | 1 + > 2 files changed, 58 insertions(+) > > diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c > b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c > index 20f940110faa..313cb244d5d6 100644 > --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c > +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c > @@ -203,6 +203,22 @@ enum intel_dpll_id icl_tc_port_to_pll_id(enum > tc_port tc_port) > return tc_port - TC_PORT_1 + DPLL_ID_ICL_MGPLL1; } > > +enum intel_dpll_id mtl_port_to_pll_id(struct intel_display *display, > +enum port port) { > + if (port >= PORT_TC1) > + return icl_tc_port_to_pll_id(intel_port_to_tc(display, port)); > + > + switch (port) { > + case PORT_A: > + return DPLL_ID_ICL_DPLL0; > + case PORT_B: > + return DPLL_ID_ICL_DPLL1; > + default: > + MISSING_CASE(port); > + return DPLL_ID_ICL_DPLL0; > + } > +} > + > static i915_reg_t > intel_combo_pll_enable_reg(struct intel_display *display, > struct intel_dpll *pll) > @@ -3490,6 +3506,36 @@ static int icl_get_tc_phy_dplls(struct > intel_atomic_state *state, > return ret; > } > > +/* > + * Get the PLL for either a port using a C10 PHY PLL, or in the > + * PTL port B eDP over TypeC PHY case, the PLL for a port using > + * a C20 PHY PLL. > + */ > +static int mtl_get_non_tc_phy_dpll(struct intel_atomic_state *state, > + struct intel_crtc *crtc, > + struct intel_encoder *encoder) { > + struct intel_display *display = to_intel_display(crtc); > + struct intel_crtc_state *crtc_state = > + intel_atomic_get_new_crtc_state(state, crtc); > + struct icl_port_dpll *port_dpll = > + &crtc_state->icl_port_dplls[ICL_PORT_DPLL_DEFAULT]; > + enum intel_dpll_id pll_id = mtl_port_to_pll_id(display, > +encoder->port); > + > + port_dpll->pll = intel_find_dpll(state, crtc, > + &port_dpll->hw_state, > + BIT(pll_id)); > + if (!port_dpll->pll) > + return -EINVAL; > + > + intel_reference_dpll(state, crtc, > + port_dpll->pll, &port_dpll->hw_state); > + > + icl_update_active_dpll(state, crtc, encoder); > + > + return 0; > +} > + > static int icl_compute_dplls(struct intel_atomic_state *state, > struct intel_crtc *crtc, > struct intel_encoder *encoder) > @@ -4387,10 +4433,21 @@ static int mtl_compute_dplls(struct > intel_atomic_state *state, > return mtl_compute_non_tc_phy_dpll(state, crtc, encoder); } > > +static int mtl_get_dplls(struct intel_atomic_state *state, > + struct intel_crtc *crtc, > + struct intel_encoder *encoder) > +{ > + if (intel_encoder_is_tc(encoder)) > + return icl_get_tc_phy_dplls(state, crtc, encoder); > + else > + return mtl_get_non_tc_phy_dpll(state, crtc, encoder); } > + > __maybe_unused > static const struct intel_dpll_mgr mtl_pll_mgr = { > .dpll_info = mtl_plls, > .compute_dplls = mtl_compute_dplls, > + .get_dplls = mtl_get_dplls, > }; > > /** > diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.h > b/drivers/gpu/drm/i915/display/intel_dpll_mgr.h > index a7946ff13cb6..322af5c55d7c 100644 > --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.h > +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.h > @@ -450,6 +450,7 @@ bool intel_dpll_compare_hw_state(struct intel_display > *display, > const struct intel_dpll_hw_state *a, > const struct intel_dpll_hw_state *b); enum > intel_dpll_id icl_tc_port_to_pll_id(enum tc_port tc_port); > +enum intel_dpll_id mtl_port_to_pll_id(struct intel_display *display, > +enum port port); > bool intel_dpll_is_combophy(enum intel_dpll_id id); > > void intel_dpll_state_verify(struct intel_atomic_state *state, > -- > 2.34.1
