Currently plane id bit is set in crtc_state->async_flip_planes only when async flip toggle workaround is needed. We want to utilize crtc_state->async_flip_planes further in Selective Fetch calculation.
v2: - rework if-else if to if-if - added comment updated Signed-off-by: Jouni Högander <[email protected]> --- drivers/gpu/drm/i915/display/intel_plane.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_plane.c b/drivers/gpu/drm/i915/display/intel_plane.c index 7b7619d59251..ccc8d6af5d72 100644 --- a/drivers/gpu/drm/i915/display/intel_plane.c +++ b/drivers/gpu/drm/i915/display/intel_plane.c @@ -600,11 +600,10 @@ static int intel_plane_atomic_calc_changes(const struct intel_crtc_state *old_cr ilk_must_disable_cxsr(new_crtc_state, old_plane_state, new_plane_state)) new_crtc_state->disable_cxsr = true; - if (intel_plane_do_async_flip(plane, old_crtc_state, new_crtc_state)) { + if (intel_plane_do_async_flip(plane, old_crtc_state, new_crtc_state)) new_crtc_state->do_async_flip = true; - new_crtc_state->async_flip_planes |= BIT(plane->id); - } else if (plane->need_async_flip_toggle_wa && - new_crtc_state->uapi.async_flip) { + + if (new_crtc_state->uapi.async_flip) { /* * On platforms with double buffered async flip bit we * set the bit already one frame early during the sync @@ -612,6 +611,9 @@ static int intel_plane_atomic_calc_changes(const struct intel_crtc_state *old_cr * hardware will therefore be ready to perform a real * async flip during the next commit, without having * to wait yet another frame for the bit to latch. + * + * async_flip_planes bitmask is also used by selective + * fetch calculation to choose full frame update. */ new_crtc_state->async_flip_planes |= BIT(plane->id); } -- 2.43.0
