Hi all,
This series introduces initial DC3CO DC state support,
replacing the existing PSR2-based TGL DC3CO design
(currently disabled).
The goal of this work is to move DC3CO handling out of PSR2-specific
code paths and into the core atomic display state flow, making the
behaviour consistent across PSR, ALPM and LOBF in line with the new
DC3CO design.
This series is posted as RFC to gather early feedback on the approach
before full integration.
Dibin Moolakadan Subrahmanian (9):
drm/i915/display: Remove TGL DC3CO support
drm/i915/display: Replace DC_STATE_EN_DC3CO with
DC_STATE_EN_UPTO_DC3CO
drm/i915/display: Add DC3CO enable/disable support
drm/i915/display: Add DC3CO eligibility logic
drm/i915/display: Track DC3CO enable source
drm/i915/display: alpm enable DC3CO support
drm/i915/display: psr enable DC3CO support
drm/i915/display: Add intel_dc3co_can_enable() helper
drm/i915/display: Add DC3CO disable handling for psr2
drivers/gpu/drm/i915/display/intel_alpm.c | 4 +
drivers/gpu/drm/i915/display/intel_display.c | 95 +++++++++
drivers/gpu/drm/i915/display/intel_display.h | 6 +-
.../gpu/drm/i915/display/intel_display_core.h | 4 +
.../drm/i915/display/intel_display_power.c | 10 +-
.../drm/i915/display/intel_display_power.h | 10 +
.../i915/display/intel_display_power_well.c | 35 ++--
.../gpu/drm/i915/display/intel_display_regs.h | 2 +-
drivers/gpu/drm/i915/display/intel_dmc_wl.c | 2 +-
drivers/gpu/drm/i915/display/intel_psr.c | 180 +++++-------------
drivers/gpu/drm/i915/display/intel_psr_regs.h | 1 +
11 files changed, 187 insertions(+), 162 deletions(-)
--
2.43.0
