On Thu, 2025-11-27 at 19:49 +0200, Imre Deak wrote: > On MST links the symbol alignment and SSC have a BW overhead, which > should be accounted for when calculating the required stream BW, do so > during mode validation for an uncompressed stream. > > Signed-off-by: Imre Deak <[email protected]> > --- > drivers/gpu/drm/i915/display/intel_dp_mst.c | 5 ++++- > 1 file changed, 4 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c > b/drivers/gpu/drm/i915/display/intel_dp_mst.c > index e4dd6b4ca0512..0db6ed2d9664c 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c > +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c > @@ -1458,6 +1458,8 @@ mst_connector_mode_valid_ctx(struct drm_connector > *_connector, > const int min_bpp = 18; > int max_dotclk = display->cdclk.max_dotclk_freq; > int max_rate, mode_rate, max_lanes, max_link_clock; > + unsigned long bw_overhead_flags = > + DRM_DP_BW_OVERHEAD_MST | DRM_DP_BW_OVERHEAD_SSC_REF_CLK; > int ret; > bool dsc = false; > u16 dsc_max_compressed_bpp = 0; > @@ -1491,7 +1493,8 @@ mst_connector_mode_valid_ctx(struct drm_connector > *_connector, > max_link_clock, max_lanes); > mode_rate = intel_dp_link_required(max_link_clock, max_lanes, > mode->clock, mode->hdisplay, > - fxp_q4_from_int(min_bpp), 0); > + fxp_q4_from_int(min_bpp), > + bw_overhead_flags); > > /* > * TODO:
Reviewed-by: Luca Coelho <[email protected]> -- Cheers, Luca.
