On Thu, 2025-11-27 at 19:49 +0200, Imre Deak wrote: > Prepare for follow-up changes also calling > intel_dp_dsc_min_sink_compressed_bpp() / > intel_dp_dsc_max_sink_compressed_bpp_x16() > without an intel_crtc_state. > > While at it remove the stale function declarations from the header > file. > > Signed-off-by: Imre Deak <[email protected]> > --- > drivers/gpu/drm/i915/display/intel_dp.c | 24 ++++++++++++----------- > - > drivers/gpu/drm/i915/display/intel_dp.h | 4 ---- > 2 files changed, 12 insertions(+), 16 deletions(-) >
Reviewed-by: Vinod Govindapillai <[email protected]> > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c > b/drivers/gpu/drm/i915/display/intel_dp.c > index 5ad71e697e585..54a037fcf5111 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp.c > +++ b/drivers/gpu/drm/i915/display/intel_dp.c > @@ -2156,7 +2156,7 @@ static int dsc_compute_link_config(struct > intel_dp *intel_dp, > > static > u16 intel_dp_dsc_max_sink_compressed_bppx16(const struct > intel_connector *connector, > - const struct > intel_crtc_state *pipe_config, > + enum intel_output_format > output_format, > int bpc) > { > u16 max_bppx16 = drm_edp_dsc_sink_output_bpp(connector- > >dp.dsc_dpcd); > @@ -2167,43 +2167,43 @@ u16 > intel_dp_dsc_max_sink_compressed_bppx16(const struct intel_connector > *connec > * If support not given in DPCD 67h, 68h use the Maximum > Allowed bit rate > * values as given in spec Table 2-157 DP v2.0 > */ > - switch (pipe_config->output_format) { > + switch (output_format) { > case INTEL_OUTPUT_FORMAT_RGB: > case INTEL_OUTPUT_FORMAT_YCBCR444: > return (3 * bpc) << 4; > case INTEL_OUTPUT_FORMAT_YCBCR420: > return (3 * (bpc / 2)) << 4; > default: > - MISSING_CASE(pipe_config->output_format); > + MISSING_CASE(output_format); > break; > } > > return 0; > } > > -int intel_dp_dsc_sink_min_compressed_bpp(const struct > intel_crtc_state *pipe_config) > +static int intel_dp_dsc_sink_min_compressed_bpp(enum > intel_output_format output_format) > { > /* From Mandatory bit rate range Support Table 2-157 (DP > v2.0) */ > - switch (pipe_config->output_format) { > + switch (output_format) { > case INTEL_OUTPUT_FORMAT_RGB: > case INTEL_OUTPUT_FORMAT_YCBCR444: > return 8; > case INTEL_OUTPUT_FORMAT_YCBCR420: > return 6; > default: > - MISSING_CASE(pipe_config->output_format); > + MISSING_CASE(output_format); > break; > } > > return 0; > } > > -int intel_dp_dsc_sink_max_compressed_bpp(const struct > intel_connector *connector, > - const struct > intel_crtc_state *pipe_config, > - int bpc) > +static int intel_dp_dsc_sink_max_compressed_bpp(const struct > intel_connector *connector, > + enum > intel_output_format output_format, > + int bpc) > { > return intel_dp_dsc_max_sink_compressed_bppx16(connector, > - pipe_config, > bpc) >> 4; > + > output_format, bpc) >> 4; > } > > int intel_dp_dsc_min_src_compressed_bpp(void) > @@ -2683,7 +2683,7 @@ intel_dp_compute_config_link_bpp_limits(struct > intel_connector *connector, > int joiner_max_bpp; > > dsc_src_min_bpp = > intel_dp_dsc_min_src_compressed_bpp(); > - dsc_sink_min_bpp = > intel_dp_dsc_sink_min_compressed_bpp(crtc_state); > + dsc_sink_min_bpp = > intel_dp_dsc_sink_min_compressed_bpp(crtc_state->output_format); > dsc_min_bpp = max(dsc_src_min_bpp, > dsc_sink_min_bpp); > limits->link.min_bpp_x16 = > fxp_q4_from_int(dsc_min_bpp); > > @@ -2697,7 +2697,7 @@ intel_dp_compute_config_link_bpp_limits(struct > intel_connector *connector, > > adjusted_mode->hdisplay, > > intel_crtc_num_joined_pipes(crtc_state)); > dsc_sink_max_bpp = > intel_dp_dsc_sink_max_compressed_bpp(connector, > - > > crtc_state, > + > crtc_state->output_format, > > limits->pipe.max_bpp / 3); > dsc_max_bpp = min(dsc_sink_max_bpp, > dsc_src_max_bpp); > dsc_max_bpp = min(dsc_max_bpp, joiner_max_bpp); > diff --git a/drivers/gpu/drm/i915/display/intel_dp.h > b/drivers/gpu/drm/i915/display/intel_dp.h > index 30eebb8cad6d2..489b8c945da39 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp.h > +++ b/drivers/gpu/drm/i915/display/intel_dp.h > @@ -150,10 +150,6 @@ u16 intel_dp_dsc_get_max_compressed_bpp(struct > intel_display *display, > enum intel_output_format > output_format, > u32 pipe_bpp, > u32 timeslots); > -int intel_dp_dsc_sink_min_compressed_bpp(const struct > intel_crtc_state *pipe_config); > -int intel_dp_dsc_sink_max_compressed_bpp(const struct > intel_connector *connector, > - const struct > intel_crtc_state *pipe_config, > - int bpc); > bool intel_dp_dsc_valid_compressed_bpp(struct intel_dp *intel_dp, > int bpp_x16); > u8 intel_dp_dsc_get_slice_count(const struct intel_connector > *connector, > int mode_clock, int mode_hdisplay,
