Add fuzzy clock check for calculated and requested port clocks. These clocks are expected to be withing +-2 kHz range.
Signed-off-by: Mika Kahola <[email protected]> --- drivers/gpu/drm/i915/display/intel_cx0_phy.c | 19 ++++++++++++++++--- drivers/gpu/drm/i915/display/intel_cx0_phy.h | 1 + 2 files changed, 17 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c b/drivers/gpu/drm/i915/display/intel_cx0_phy.c index a33150db2f16..ef23a3fb3286 100644 --- a/drivers/gpu/drm/i915/display/intel_cx0_phy.c +++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.c @@ -2205,6 +2205,11 @@ static int intel_c20pll_calc_port_clock(struct intel_encoder *encoder, return vco << tx_rate_mult >> tx_clk_div >> tx_rate; } +bool intel_cx0pll_clock_matches(int clock1, int clock2) +{ + return abs(clock1 - clock2) <= 2; +} + /* * TODO: Convert the following to align with intel_c20pll_find_table() and * intel_c20pll_calc_state_from_table(). @@ -2218,7 +2223,10 @@ static int intel_c10pll_calc_state_from_table(struct intel_encoder *encoder, int i; for (i = 0; tables; i++) { - if (port_clock == tables[i].clock_rate) { + int clock = intel_c10pll_calc_port_clock(tables[i].c10); + + drm_WARN_ON(display->drm, !intel_cx0pll_clock_matches(clock, tables[i].clock_rate)); + if (intel_cx0pll_clock_matches(port_clock, clock)) { pll_state->c10 = *tables[i].c10; intel_cx0pll_update_ssc(encoder, pll_state, is_dp); intel_c10pll_update_pll(encoder, pll_state); @@ -2709,9 +2717,14 @@ intel_c20_pll_find_table(struct intel_display *display, if (!tables) return NULL; - for (i = 0; tables; i++) - if (port_clock == tables[i].clock_rate) + for (i = 0; tables; i++) { + int clock = intel_c20pll_calc_port_clock(tables[i].c20); + + drm_WARN_ON(display->drm, !intel_cx0pll_clock_matches(clock, tables[i].clock_rate)); + + if (intel_cx0pll_clock_matches(port_clock, clock)) return &tables[i]; + } return NULL; } diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.h b/drivers/gpu/drm/i915/display/intel_cx0_phy.h index 9f10113e2d18..3d9c580eb562 100644 --- a/drivers/gpu/drm/i915/display/intel_cx0_phy.h +++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.h @@ -43,6 +43,7 @@ void intel_mtl_tbt_pll_enable_clock(struct intel_encoder *encoder, int port_clock); void intel_mtl_tbt_pll_disable_clock(struct intel_encoder *encoder); +bool intel_cx0pll_clock_matches(int clock1, int clock2); int intel_cx0pll_calc_state(const struct intel_crtc_state *crtc_state, struct intel_encoder *encoder, struct intel_dpll_hw_state *hw_state); -- 2.34.1
