Make intel_dram.c free from including i915_reg.h.

v2: Move mem config register to newly added pcode header (Jani)

Signed-off-by: Uma Shankar <[email protected]>
---
 drivers/gpu/drm/i915/display/intel_dram.c | 2 +-
 drivers/gpu/drm/i915/i915_reg.h           | 6 ------
 include/drm/intel/intel_pcode.h           | 6 ++++++
 3 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dram.c 
b/drivers/gpu/drm/i915/display/intel_dram.c
index 3b9879714ea9..3366e18f594e 100644
--- a/drivers/gpu/drm/i915/display/intel_dram.c
+++ b/drivers/gpu/drm/i915/display/intel_dram.c
@@ -7,8 +7,8 @@
 
 #include <drm/drm_managed.h>
 #include <drm/drm_print.h>
+#include <drm/intel/intel_pcode.h>
 
-#include "i915_reg.h"
 #include "intel_display_core.h"
 #include "intel_display_utils.h"
 #include "intel_dram.h"
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 4341308c3b2b..bc466d8c8c60 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -1010,12 +1010,6 @@
 #define OROM_OFFSET                            _MMIO(0x1020c0)
 #define   OROM_OFFSET_MASK                     REG_GENMASK(20, 16)
 
-#define MTL_MEM_SS_INFO_GLOBAL                 _MMIO(0x45700)
-#define   XE3P_ECC_IMPACTING_DE                        REG_BIT(12)
-#define   MTL_N_OF_ENABLED_QGV_POINTS_MASK     REG_GENMASK(11, 8)
-#define   MTL_N_OF_POPULATED_CH_MASK           REG_GENMASK(7, 4)
-#define   MTL_DDR_TYPE_MASK                    REG_GENMASK(3, 0)
-
 #define MTL_MEDIA_GSI_BASE             0x380000
 
 #endif /* _I915_REG_H_ */
diff --git a/include/drm/intel/intel_pcode.h b/include/drm/intel/intel_pcode.h
index 8e9a574c87d9..f6f894ba9b20 100644
--- a/include/drm/intel/intel_pcode.h
+++ b/include/drm/intel/intel_pcode.h
@@ -105,4 +105,10 @@
 #define     PCODE_MBOX_DOMAIN_NONE             0x0
 #define     PCODE_MBOX_DOMAIN_MEDIAFF          0x3
 
+#define MTL_MEM_SS_INFO_GLOBAL                 _MMIO(0x45700)
+#define   XE3P_ECC_IMPACTING_DE                        REG_BIT(12)
+#define   MTL_N_OF_ENABLED_QGV_POINTS_MASK     REG_GENMASK(11, 8)
+#define   MTL_N_OF_POPULATED_CH_MASK           REG_GENMASK(7, 4)
+#define   MTL_DDR_TYPE_MASK                    REG_GENMASK(3, 0)
+
 #endif
-- 
2.50.1

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