> -----Original Message-----
> From: Intel-xe <[email protected]> On Behalf Of Maarten
> Lankhorst
> Sent: Wednesday, January 21, 2026 7:23 PM
> To: [email protected]; [email protected]
> Cc: Maarten Lankhorst <[email protected]>
> Subject: [i915-rt v5 07/21] drm/i915/display: Handle vlv dsi workaround in
> scanline_in_safe_range too
>
> Now that we have a macro, might as well handle the VLV dsi workaround too.
>
> This makes the vblank evasion code slightly more deterministic, by not looping
> with interrupts disabled.
Looks Good to me.
Reviewed-by: Uma Shankar <[email protected]>
> Signed-off-by: Maarten Lankhorst <[email protected]>
> ---
> drivers/gpu/drm/i915/display/intel_vblank.c | 36 ++++++++++-----------
> 1 file changed, 18 insertions(+), 18 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_vblank.c
> b/drivers/gpu/drm/i915/display/intel_vblank.c
> index 58c374a7530fe..6bc784563a7c1 100644
> --- a/drivers/gpu/drm/i915/display/intel_vblank.c
> +++ b/drivers/gpu/drm/i915/display/intel_vblank.c
> @@ -739,6 +739,24 @@ static bool scanline_in_safe_range(struct
> intel_vblank_evade_ctx *evade, int *sc
> else
> *scanline = __intel_get_crtc_scanline(evade->crtc);
>
> + /*
> + * On VLV/CHV DSI the scanline counter would appear to
> + * increment approx. 1/3 of a scanline before start of vblank.
> + * The registers still get latched at start of vblank however.
> + * This means we must not write any registers on the first
> + * line of vblank (since not the whole line is actually in
> + * vblank). And unfortunately we can't use the interrupt to
> + * wait here since it will fire too soon. We could use the
> + * frame start interrupt instead since it will fire after the
> + * critical scanline, but that would require more changes
> + * in the interrupt code. So for now we'll just do the nasty
> + * thing and poll for the bad scanline to pass us by.
> + *
> + * FIXME figure out if BXT+ DSI suffers from this as well
> + */
> + if (evade->need_vlv_dsi_wa && *scanline == evade->vblank_start)
> + return false;
> +
> return *scanline < evade->min || *scanline > evade->max; }
>
> @@ -769,24 +787,6 @@ int intel_vblank_evade(struct intel_vblank_evade_ctx
> *evade)
> local_irq_disable();
> }
>
> - /*
> - * On VLV/CHV DSI the scanline counter would appear to
> - * increment approx. 1/3 of a scanline before start of vblank.
> - * The registers still get latched at start of vblank however.
> - * This means we must not write any registers on the first
> - * line of vblank (since not the whole line is actually in
> - * vblank). And unfortunately we can't use the interrupt to
> - * wait here since it will fire too soon. We could use the
> - * frame start interrupt instead since it will fire after the
> - * critical scanline, but that would require more changes
> - * in the interrupt code. So for now we'll just do the nasty
> - * thing and poll for the bad scanline to pass us by.
> - *
> - * FIXME figure out if BXT+ DSI suffers from this as well
> - */
> - while (evade->need_vlv_dsi_wa && scanline == evade->vblank_start)
> - scanline = intel_get_crtc_scanline(crtc);
> -
> return scanline;
> }
>
> --
> 2.51.0
