On Thu, 05 Feb 2026, Uma Shankar <[email protected]> wrote:
> Make intel_display_power_well.c free from including i915_reg.h.
>
> v3: Separate bit field for VLV (Ville)
>
> v2: Include specific pcode header, drop common header (Jani)
>
> Signed-off-by: Uma Shankar <[email protected]>

Reviewed-by: Jani Nikula <[email protected]>

> ---
>  drivers/gpu/drm/i915/display/intel_display_power_well.c | 3 +--
>  drivers/gpu/drm/i915/display/intel_display_regs.h       | 1 +
>  2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power_well.c 
> b/drivers/gpu/drm/i915/display/intel_display_power_well.c
> index 45c4313e6900..9c8d29839caf 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power_well.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_power_well.c
> @@ -8,7 +8,6 @@
>  #include <drm/drm_print.h>
>  #include <drm/intel/intel_pcode_regs.h>
>  
> -#include "i915_reg.h"
>  #include "intel_backlight_regs.h"
>  #include "intel_combo_phy.h"
>  #include "intel_combo_phy_regs.h"
> @@ -1277,7 +1276,7 @@ static void vlv_init_display_clock_gating(struct 
> intel_display *display)
>        * Disable trickle feed and enable pnd deadline calculation
>        */
>       intel_de_write(display, MI_ARB_VLV,
> -                    MI_ARB_DISPLAY_TRICKLE_FEED_DISABLE);
> +                    MI_ARB_DISPLAY_TRICKLE_FEED_DISABLE_VLV);
>       intel_de_write(display, CBR1_VLV, 0);
>  
>       drm_WARN_ON(display->drm, DISPLAY_RUNTIME_INFO(display)->rawclk_freq == 
> 0);
> diff --git a/drivers/gpu/drm/i915/display/intel_display_regs.h 
> b/drivers/gpu/drm/i915/display/intel_display_regs.h
> index 1c77a7de2d6e..d661385a1edd 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_regs.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_regs.h
> @@ -350,6 +350,7 @@
>  #define  FW_CSPWRDWNEN               (1 << 15)
>  
>  #define MI_ARB_VLV           _MMIO(VLV_DISPLAY_BASE + 0x6504)
> +#define   MI_ARB_DISPLAY_TRICKLE_FEED_DISABLE_VLV    (1 << 2)
>  
>  #define CZCLK_CDCLK_FREQ_RATIO       _MMIO(VLV_DISPLAY_BASE + 0x6508)
>  #define   CDCLK_FREQ_SHIFT   4

-- 
Jani Nikula, Intel

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