Simplify the PSR SCL (Set Context Latency) condition logic, then extend it to support always-on VRR timing generator where SCL can be 0.
Ankit Nautiyal (2): drm/i915/psr: Simplify the conditions for SCL computation drm/i915/psr: Allow SCL=0 on platforms with always-on VRR TG drivers/gpu/drm/i915/display/intel_psr.c | 14 ++++++-------- 1 file changed, 6 insertions(+), 8 deletions(-) -- 2.45.2
