[PATCH v2 3/4] drm/i915/psr: Apply Intel DPCD workaround when SDP on prior line used

[Jouni Högander]

There is Intel specific workaround DPCD address containing workaround for
case where SDP is on prior line. Apply this workaround according to values
in the offset.

Fixes: 61e887329e33 ("drm/i915/xelpd: Handle PSR2 SDP indication in the prior 
scanline")
Cc: <sta...@vger.kernel.org> # v5.15+
Signed-off-by: Jouni Högander <jouni.hogan...@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kand...@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 35 +++++++++++++++++++++---
 1 file changed, 31 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c 
b/drivers/gpu/drm/i915/display/intel_psr.c
index 749057e96647..2f78d76c4ee1 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1389,9 +1389,35 @@ static bool psr2_granularity_check(struct 
intel_crtc_state *crtc_state,
        return true;
 }
 
-static bool _compute_psr2_sdp_prior_scanline_indication(struct intel_dp 
*intel_dp,
-                                                       struct intel_crtc_state 
*crtc_state)
+static bool apply_scanline_indication_wa(struct intel_crtc_state *crtc_state,
+                                        struct intel_connector *connector)
 {
+       struct intel_dp *intel_dp = intel_attached_dp(connector);
+       u8 early_scanline_support = connector->dp.psr_caps.intel_wa_dpcd &
+               
INTEL_DPCD_INTEL_WA_REGISTER_CAPS_PSR2_EARLYSCANLINE_SDP_SUPPORT_MASK;
+
+       if (intel_dp->edp_dpcd[0] >= DP_EDP_15)
+               return true;
+
+       switch (early_scanline_support) {
+       case INTEL_DPCD_INTEL_WA_REGISTER_CAPS_FALL_BACK_TO_PSR1:
+               crtc_state->req_psr2_sdp_prior_scanline = false;
+               return false;
+       case INTEL_DPCD_INTEL_WA_REGISTER_CAPS_PSR2_WITH_EARLY_SCANLINE:
+               return true;
+       case INTEL_DPCD_INTEL_WA_REGISTER_CAPS_PSR2_WITHOUT_EARLY_SCANLINE:
+               crtc_state->req_psr2_sdp_prior_scanline = false;
+               return true;
+       default:
+               MISSING_CASE(early_scanline_support);
+               return false;
+       }
+}
+
+static bool _compute_psr2_sdp_prior_scanline_indication(struct 
intel_crtc_state *crtc_state,
+                                                       struct intel_connector 
*connector)
+{
+       struct intel_dp *intel_dp = intel_attached_dp(connector);
        struct intel_display *display = to_intel_display(intel_dp);
        const struct drm_display_mode *adjusted_mode = 
&crtc_state->uapi.adjusted_mode;
        u32 hblank_total, hblank_ns, req_ns;
@@ -1410,7 +1436,8 @@ static bool 
_compute_psr2_sdp_prior_scanline_indication(struct intel_dp *intel_d
                return false;
 
        crtc_state->req_psr2_sdp_prior_scanline = true;
-       return true;
+
+       return apply_scanline_indication_wa(crtc_state, connector);
 }
 
 static int intel_psr_entry_setup_frames(struct intel_dp *intel_dp,
@@ -1691,7 +1718,7 @@ static bool intel_sel_update_config_valid(struct 
intel_crtc_state *crtc_state,
                                                                      
conn_state))
                goto unsupported;
 
-       if (!_compute_psr2_sdp_prior_scanline_indication(intel_dp, crtc_state)) 
{
+       if (!_compute_psr2_sdp_prior_scanline_indication(crtc_state, 
connector)) {
                drm_dbg_kms(display->drm,
                            "Selective update not enabled, SDP indication do 
not fit in hblank\n");
                goto unsupported;
-- 
2.43.0