CMRR is treated as a fixed-RR case using the VRR timing generator,
where vmin = vmax = flipline and vtotal is derived from a configurable
fractional scaling level.
On CMRR-capable eDP, the fixed-RR timing path computes CMRR vtotal and
programs CMRR M/N based on the configured level.
Mitul Golani (8):
drm/i915/display: Move CMRR crtc state into vrr state
drm/i915/vrr: Move CMRR register writes to fix refresh rate path
drm/i915/display: Introduce CMRR fraction level to vrr crtc state
drm/i915/display: Add state dump for CMRR params
i915/display/vrr: Compute CMRR params along with fixed refresh rate
params
drm/i915/display: Add per-CRTC debugfs interface for CMRR fraction
level
drm/i915/vrr: Compute CMRR vtotal based on configured scaling level
i915/display/vrr: Enable CMRR
.../drm/i915/display/intel_crtc_state_dump.c | 6 +
drivers/gpu/drm/i915/display/intel_display.c | 10 +-
.../drm/i915/display/intel_display_debugfs.c | 2 +
.../drm/i915/display/intel_display_types.h | 17 +-
drivers/gpu/drm/i915/display/intel_dp.c | 2 +-
drivers/gpu/drm/i915/display/intel_vrr.c | 218 ++++++++++++------
drivers/gpu/drm/i915/display/intel_vrr.h | 3 +
7 files changed, 172 insertions(+), 86 deletions(-)
--
2.48.1
