CMRR is not a separate VRR operating mode but a special case of fixed refresh rate with the VRR timing generator enabled. Like regular fixed-RR, CMRR operates with vmin = vmax = flipline, but derives the vtotal via a fractional multiplier rather than using the nominal mode vtotal directly.
When CMRR fraction is required on an eDP panel, cmrr_get_vtotal() is used to compute the fractional vtotal; otherwise the standard mode vtotal is used. Signed-off-by: Mitul Golani <[email protected]> --- drivers/gpu/drm/i915/display/intel_vrr.c | 33 +++++++----------------- 1 file changed, 10 insertions(+), 23 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c index 8d79d289378b..bbc68c614667 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.c +++ b/drivers/gpu/drm/i915/display/intel_vrr.c @@ -230,23 +230,6 @@ cmrr_get_vtotal(struct intel_crtc_state *crtc_state, bool video_mode_required) return vtotal; } -static -void intel_vrr_compute_cmrr_timings(struct intel_crtc_state *crtc_state) -{ - /* - * TODO: Compute precise target refresh rate to determine - * if video_mode_required should be true. Currently set to - * false due to uncertainty about the precise target - * refresh Rate. - */ - crtc_state->vrr.vmax = cmrr_get_vtotal(crtc_state, false); - crtc_state->vrr.vmin = crtc_state->vrr.vmax; - crtc_state->vrr.flipline = crtc_state->vrr.vmin; - - crtc_state->vrr.cmrr.enable = true; - crtc_state->mode_flags |= I915_MODE_FLAG_VRR; -} - static void intel_vrr_compute_vrr_timings(struct intel_crtc_state *crtc_state, int vmin, int vmax) @@ -260,10 +243,16 @@ void intel_vrr_compute_vrr_timings(struct intel_crtc_state *crtc_state, } static -void intel_vrr_compute_fixed_rr_timings(struct intel_crtc_state *crtc_state) +void intel_vrr_compute_fixed_rr_timings(struct intel_crtc_state *crtc_state, + bool is_edp) { - /* For fixed rr, vmin = vmax = flipline */ - crtc_state->vrr.vmax = crtc_state->hw.adjusted_mode.crtc_vtotal; + if (is_cmrr_frac_required(crtc_state) && is_edp) { + /* For CMRR, vmin = vmax = flipline = Dethered Vtotal */ + crtc_state->vrr.vmax = cmrr_get_vtotal(crtc_state, false); + } else { + /* For fixed rr, vmin = vmax = flipline */ + crtc_state->vrr.vmax = crtc_state->hw.adjusted_mode.crtc_vtotal; + } crtc_state->vrr.vmin = crtc_state->vrr.vmax; crtc_state->vrr.flipline = crtc_state->vrr.vmin; } @@ -468,10 +457,8 @@ intel_vrr_compute_config(struct intel_crtc_state *crtc_state, if (crtc_state->uapi.vrr_enabled && vmin < vmax) intel_vrr_compute_vrr_timings(crtc_state, vmin, vmax); - else if (is_cmrr_frac_required(crtc_state) && is_edp) - intel_vrr_compute_cmrr_timings(crtc_state); else - intel_vrr_compute_fixed_rr_timings(crtc_state); + intel_vrr_compute_fixed_rr_timings(crtc_state, is_edp); if (HAS_AS_SDP(display)) { crtc_state->vrr.vsync_start = -- 2.48.1
