Enable Adaptive Sync SDP for Panel replay + auxless ALPM. First few patches are fixes in existing AS SDP enablement and drm core changes for Panel replay with SDP. Later patches add the support to send AS SDP for Panel replay with Link ON and with auxless ALPM (Link-Off).
This series is in continuation from discussions in [1] [2] [3] and is actually revision 5 of the series [4]. While sending patches Rev 3 of [4], patchwork encountered an issue and somehow dropped few patches from the series, and created new patchwork links with incomplete list of patches for rev 3 and 4. With this CI couldnt pick up the series for testing. To avoid further confusion and more patchwork links with missing patches, I am modifying the subject of the series to create new 'final' patchwork link (with a hope that patchwork doesn't miss anymore patches) for which we can get the CI results. As the first few drm core changes get reviews, I intend to send those separately and get them merge next. [1] https://lore.kernel.org/all/[email protected]/ [2] https://lore.kernel.org/all/[email protected]/ [3] https://lore.kernel.org/intel-gfx/[email protected]/T/#m6e8beab2cc3b6ff9d61f740f107d83a2f4e08114 [4] https://patchwork.freedesktop.org/series/161977/#rev2 Changes from last revision of Series [4] - Add helper to print SDP version in the logs and use it. - Fill missing sdp_type field in AS SDP unpack. - Check PR support also in helper intel_psr_pr_async_video_timing_supported() - Add #TODO to check Display ID 2.0 blocks for AS SDP for determining AS SDP v2 support. - Check if PR is enabled along with AS SDP enable before setting relevant Downspread CTRL DPCD bits. Rev 5: - Since all DRM core changes and PCON related fixes are merged, rebase the remaining patches. Rev 6: - Re-spin of previous 11-patch series with one previously omitted patch added as 12/12. Patches 1-11 are unchanged from previous revision. Rev 7: - Address review comments form Ville. - Drop patch to split AS SDP computation between compute_config and compute_config_late. Rev 8: - In "Enable AS SDP whenever VRR is possible or PR !async": use intel_psr_needs_alpm_aux_less() instead of intel_alpm_is_alpm_aux_less() so the LOBF case is not pulled in. (Ville) Rev 9: - Add missing patch to move intel_dp_compute_as_sdp() after intel_psr_compute_config(), since the new AS SDP check depends on crtc_state->has_panel_replay set by PSR compute. Ankit Nautiyal (12): drm/i915/psr: Add helper to get Async Video timing support in PR active drm/i915/dp: Add member to intel_dp to store AS SDP v2 support drm/i915/dp: Allow AS SDP only if v2 is supported drm/i915/psr: Write the PR config DPCDs in burst mode drm/i915/display: Add helper for AS SDP transmission time selection drm/i915/psr: Program Panel Replay CONFIG3 using AS SDP transmission time drm/i915/dp: Set relevant Downspread Ctrl DPCD bits for PR + Auxless ALPM drm/i915/dp: Program AS SDP DB[1:0] for PR with Link off drm/i915/dp: Compute and include coasting vtotal for AS SDP drm/i915/dp: Compute AS SDP after PSR compute config drm/i915/dp: Enable AS SDP whenever VRR is possible or PR !async drm/i915/dp: Account for AS_SDP guardband only when enabled drivers/gpu/drm/i915/display/intel_alpm.c | 20 +++- drivers/gpu/drm/i915/display/intel_display.c | 3 +- .../drm/i915/display/intel_display_types.h | 1 + drivers/gpu/drm/i915/display/intel_dp.c | 102 ++++++++++++++++-- drivers/gpu/drm/i915/display/intel_dp.h | 2 + .../drm/i915/display/intel_dp_link_training.c | 20 +++- .../drm/i915/display/intel_dp_link_training.h | 3 +- drivers/gpu/drm/i915/display/intel_dp_mst.c | 2 +- drivers/gpu/drm/i915/display/intel_psr.c | 40 ++++--- drivers/gpu/drm/i915/display/intel_psr.h | 1 + 10 files changed, 166 insertions(+), 28 deletions(-) -- 2.45.2
